2021
DOI: 10.1109/access.2021.3066948
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Hybrid Boolean Networks as Physically Unclonable Functions

Abstract: We introduce a Physically Unclonable Function (PUF) based on an ultra-fast chaotic network known as a Hybrid Boolean Network (HBN) implemented on a field programmable gate array. The network, consisting of N coupled asynchronous logic gates displaying dynamics on the sub-nanosecond time scale, acts as a 'digital fingerprint' by amplifying small manufacturing variations during a period of transient chaos. In contrast to other PUF designs, we use both N-bits per challenge and obtain N-bits per response by consid… Show more

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Cited by 12 publications
(12 citation statements)
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References 25 publications
(36 reference statements)
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“…In our protocol, we use a recently proposed PUF scheme. HBN-PUF [32] is a strong, chaos-enhanced, and asynchronous PUF. According to [33], the creators of HBN-PUF aim to move quickly to commercialize this technology.…”
Section: A Physical Unclonable Function (Puf)mentioning
confidence: 99%
“…In our protocol, we use a recently proposed PUF scheme. HBN-PUF [32] is a strong, chaos-enhanced, and asynchronous PUF. According to [33], the creators of HBN-PUF aim to move quickly to commercialize this technology.…”
Section: A Physical Unclonable Function (Puf)mentioning
confidence: 99%
“…Such measurements have important consequences for FPGA-based cryptographic primitives such as those described in Ref. [27], which rely on obfuscation of these properties. As such, the WCD may open new attacks on these security architectures.…”
Section: Case Study: Asynchronous Ring-oscillatormentioning
confidence: 99%
“…IV, we place the RO compactly within a single MLAB and control the initial state of the RO using a multiplexer following the appendix of Ref. [27]. This yields Verilog code of the form 'ring[i] = enable ?…”
Section: B Low-level Primitives On Cyclone Vmentioning
confidence: 99%
“…T Echnologies that use unclocked or asynchronous logic designs in Field-Programmable Gate Arrays (FPGAs) to realize software-defined delays are prevalent throughout the engineering literature. Recent applications include timeto-digital converters (TDCs) [1], [2], physically unclonable functions (PUFs) [3]- [7], true random number generators (TRNGs) [8]- [11], and reservoir computers [12]- [14]. In many of these designs, cascaded logic elements (often an even number of inverters or NOT-gates [15], [16]) are used to approximate ideal delays for logic levels and switching times.…”
Section: Introductionmentioning
confidence: 99%