Hybrid BIST optimization using reseeding and test set compaction

Using Tabu Search for optimization of memory-constrained hybrid BIST

“…ISCAS'89 circuits were redesigned in order to include full scan path. The results of the experiments are presented in Table 1 and Table 2 As it can be seen from the results, the length of the test found by the proposed method is not always exact but nevertheless its length quite close to the shortest test under the given memory constraint found by method [10]. However, the number of calculations needed to find the test is significantly smaller when compared to results of the reseeding and compaction approach.…”

“…As can be seen from the simulations and experiments [10], the solution space is not linear, containing number of local optima (Figure 7).…”

“…As it might happen that the test sequences could substantially be shortened if the tests are applied in different order or the sequences are split into smaller sequences and applied in a mixed mode. Such a mixed mode approach is commonly known as reseeding and in our recent work we successfully combined the hybrid BIST optimization techniques with reseeding ideas [10].…”

“…The length of the blocks influences heavily the characteristics of the solutions L and M. To illustrate the impact of equal length pseudorandom test blocks and variable length pseudorandom test blocks, the simulations were carried out for ISCAS benchmarks [10]. On Figure 3 an example is depicted, showing curves L 1 (b), L 2 (b) and M(b) for circuit c1908.…”

“…The hybrid BIST length reduction using reseeding and test set compaction, proposed in [10] is a method for finding the length of the pseudorandom tests, such that memory (the number of deterministic test vectors used as LFSR seeds) is constrained, the test time is minimized and the maximum achievable fault coverage is achieved. The short description of the algorithm is given below.…”