2015
DOI: 10.1063/1.4905210
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Hybrid architecture for shallow accumulation mode AlGaAs/GaAs heterostructures with epitaxial gates

Abstract: This is a repository copy of Hybrid architecture for shallow accumulation mode AlGaAs/GaAs heterostructures with epitaxial gates.

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Cited by 10 publications
(7 citation statements)
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References 32 publications
(30 reference statements)
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“…The aluminium is deposited in an arsenic-depleted ambience. b In the molecular beam epitaxy chamber used here, the background impurity concentration is estimated to be ~ 5 × 10 14 cm −3 for Al 0.33 Ga 0.67 As layers 50 . The doping concentration is around 2 × 10 18 cm −3 for the n + layer, while for p + and p ++ layers, it is around 2 × 10 18 cm −3 and 8 × 10 18 cm −3 , respectively.…”
Section: Resultsmentioning
confidence: 99%
“…The aluminium is deposited in an arsenic-depleted ambience. b In the molecular beam epitaxy chamber used here, the background impurity concentration is estimated to be ~ 5 × 10 14 cm −3 for Al 0.33 Ga 0.67 As layers 50 . The doping concentration is around 2 × 10 18 cm −3 for the n + layer, while for p + and p ++ layers, it is around 2 × 10 18 cm −3 and 8 × 10 18 cm −3 , respectively.…”
Section: Resultsmentioning
confidence: 99%
“…The MBE aluminum FET has a double‐gate structure, which enables control of the density in the channel and the ohmic contacts separately. [ 17,28 ] The first control FET was fabricated by wet‐etching the MBE‐grown aluminum away, and then evaporating an aluminum gate onto the wafer surface in a standard thermal evaporator (see “device structure” Figure 2b). The second control transistor has a metal‐oxide FET architecture; the MBE‐grown aluminum was etched away and a 25 nm aluminum oxide layer (AlO x ) was deposited by atomic layer deposition (ALD).…”
Section: Resultsmentioning
confidence: 99%
“…This approach resulted in a marked increase in 2DEG mobility due to the reduction of surface charge. [ 15–17 ] Despite successfully minimizing unwanted effects of surface charge, this approach has limitations; patterning increasingly finer structures on the doped semiconductor gate leads to charge depletion in the nano‐patterned gate, which causes the gate to become insulating and non‐functional. An alternative option is to use an MBE‐grown epitaxial aluminum gate (Figure 1b), which has a much smaller depletion length than the heavily doped semiconductor.…”
Section: Introductionmentioning
confidence: 99%
“…The observed values of the local Zeeman field are explained by shifts of the QD positions of around 100 nm in the z direction, which is possible in this QQD device (see Supplementary Information ). The unexpected position-shift might be compensated by additional tuning of the gate voltages or removing inhomogeneous potentials by using undoped device structures 41 42 43 .…”
Section: Discussionmentioning
confidence: 99%