Hot-carrier-induced circuit degradation in actual DRAM

Abstract

The hot-carrier effects on DRAM have been evaluated thoroughly by investigating the performance degradation of each constituent circuit as a result of component transistor aging in a 64Mb DRAM. The mechanism how the overall circuit performance is affected by unit transistor aging and which transistors cause most critical circuit performance failures is discussed. It was found that hot-carrier-induced transistor aging in the circuit block did not directly affect the speed degradation, but instead, seriously reduced the design margin of the analog circuit. The circuit performance degradation caused by hot-carrier stress depended more on the circuit structure including output loading rather than the voltage level. In addition, on-chip hotcarrier stresshest patterns were also used to investigate the influence of different output loads of inverter on the dynamic hot-carrier degradation. It was found that the inverter with heavy output load showed less degradation in comparison to the inverter with small load.