Hot carrier effects in short MOSFETs at low applied voltages

Electron Injection into the Gate Oxide of MOS Structures at Liquid Nitrogen Temperature : Measurement and Simulation

“…6 shows f (E,) for bias points in the high and low voltage regime. As expected [3], a thermal tail with an effective T = 77 K equal to the lattice temperature is observed at energies higher than q'VToTln, which is mostly due to phonon absorption [3]. Furthermore a peak due to ballistic electrons can be seen at ~' V T O T~~.…”

“…However, in the low voltage regime even the energy of ballistic electrons ~V T O T is not sufficient for injection over the barrier. Electrons may gain energies larger than qvToT in absorbing energy from lattice phonons [3]. Under these conditions the distribution function at the interface should exhibit a so-called thermal tail above qvTOT with a slope equal to the lattice temperature, as suggested by numerical and analytical results [3, 61. Since in this case the number of phonon absorptions is proportional to NB, at low applied VToT one would expect PJN to decrease with decreasing T. This would lead to smaller PJN values at 77 K than at 300 K, and PjN curves for different temperatures could cross each other (crossover).…”

Self-Heating-Induced Spatial Spread of Interface State Generation by Hot-Electron Effect: Role of the High-Energy Tail Electron

“…At a higher lattice temperature, enhancement of the high-energy tail leads to substantial interface state generation in the channel region (x = m). Based on MC simulation [18], the slope of the "thermal tail" may be expressed as 0.2 × (T /100) eV per ten-decade change in the electron distribution, where T is the lattice temperature (in kelvins). A twofold increase in the lattice temperature substantially increases the relative distribution of hot electrons in the tail region with a given energy E. For instance, if the relative distribution of electrons with energy E is 10 −10 at T , the corresponding relative distribution at 2T is higher by five orders of magnitude.…”

Effect of electron–electron scattering at an elevated temperature on device lifetime of nanoscale nMOSFETs

“…Jo et al compared CHC (V g = V d ) and EES (V g > V d ) stresses, and reported that high-energy tail electrons caused severe damage to an nMOSFET by enhancing interface states [3]. Abramo et al reported that the high-energy tail was enhanced substantially both in the channel and inside the drain region [8]. Although EES stress causes severe device degradation, CHC stress results in more critical damage because CHC stress generates more interface states than EES stress [3].…”

“…However, low bias HC stress has been reported to cause severe damage to devices [3,[7][8][9]. In particular, a few researchers reported severe degradation of devices under low V d with high temperature because of electron-electron scattering (EES) [7][8][9].…”