Horizon: a retargetable compiler for horizontal microarchitectures

Mueller, Robert A.; Duda, Michael; Sweany, Philip; Walicki, Jack S.

doi:10.1109/32.6135

Cited by 6 publications

(2 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It has been developed at Colorado State University [147,148] and has its roots in the HORIZON compiler [149] (see also chapter 4). ROCKET has been targeted towards Alpha, i860, and RS/6000.…”

Section: Rocketmentioning

confidence: 99%

Retargetable Compiler Technology for Embedded Systems

Leupers

Marwedel

2001

View full text Add to dashboard Cite

Section: Rocketmentioning

confidence: 99%

Retargetable Compiler Technology for Embedded Systems

Leupers

Marwedel

2001

View full text Add to dashboard Cite

“…Inherent to each alternative is the need to represent the machine resource limitations as well as the resource timing information associated with each type of architecture resource. Since the focus of this paper is related to scheduling of DDDs rather than the building of them, we refer the interested reader elsewhere [14][15][16][17] for details.…”

Section: Building Dddsmentioning

confidence: 99%

Building a retargetable local instruction scheduler

Allan

Beaty

et al. 1998

Softw: Pract. Exper.

View full text Add to dashboard Cite

SUMMARYWhile high-performance architectures have included some Instruction-Level Parallelism (ILP) for at least 25 years, recent computer designs have exploited ILP to a significant degree. Although a local scheduler is not sufficient for generation of excellent ILP code, it is necessary as many global scheduling and software pipelining techniques rely on a local scheduler. Global scheduling techniques are well-documented, yet practical discussions of local schedulers are notable in their absence. This paper strives to remedy that disparity by describing a list scheduling framework and several important practical details that, taken together, allow implementation of an efficient local instruction scheduler that is easily retargetable for ILP architectures.The foundation of our machine-independent instruction scheduler is a timing model that allows easy retargetability to a wide range of architectures. In addition to describing how a general listscheduler can be implemented within the framework of our timing model, experimental results indicate that lookahead scheduling can profoundly improve a scheduler's ability to produce a legal schedule. Further experimental data shows that deciding to schedule a data dependence DAG (DDD) in forward or reverse order depends significantly upon that target architecture, suggesting the possibility of scheduling in each direction and using the best of the two schedules.In contrast, experiments demonstrate little difference in code quality for schedules generated by either instruction-driven or operation-driven schedulers. Thus, the inherent flexibility of operationdriven methods suggests including that approach in a retargetable instruction scheduler.List scheduling is, of course, a heuristic scheduling method. A variety of scheduling heuristics are presented. In addition, the paper describes a method, using a genetic algorithm search, to 'fine-tune' the weights of twenty-four individual heuristics to form a DDD-node heuristic tuned to a specific architecture.

show abstract

A Microprogramming Support Tool For Pipelined Architectures

Molnár¹,

Surles

[1988] Proceedings of the 21st Annual Workshop on Microprogramming and Microarchitecture - MICRO '21

View full text Add to dashboard Cite

Horizon: a retargetable compiler for horizontal microarchitectures

Cited by 6 publications

References 17 publications

Retargetable Compiler Technology for Embedded Systems

Retargetable Compiler Technology for Embedded Systems

Building a retargetable local instruction scheduler

A Microprogramming Support Tool For Pipelined Architectures

Contact Info

Product

Resources

About