“…Meanwhile, the floating gate layer is also anticipated to be a promising constituent in the three-terminal NVM device’s structure for higher charge storage capacity and suitable endurance/retention memory operations [ 8 , 9 , 19 , 20 , 26 ]. Additionally, the charge-trap layer such as HfO 2 , SiN, and redox state molecule has been introduced in the NVM device’s structure to store and erase the charge according to the memory state controlled by a swing in the threshold voltage (V th ) [ 27 , 28 , 29 , 30 , 31 ]. On the contrary, NVM devices based on metallic nanoparticles as a floating gate have gained more advantages, such as higher tapping probability of charges, ensuring the stable probability of retention property in case of defects in the tunneling or control oxide layer, and larger memory window [ 8 , 32 , 33 , 34 ].…”