2014 17th Euromicro Conference on Digital System Design 2014
DOI: 10.1109/dsd.2014.60
|View full text |Cite
|
Sign up to set email alerts
|

HOG Feature Extractor Hardware Accelerator for Real-Time Pedestrian Detection

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

0
10
0
1

Year Published

2015
2015
2023
2023

Publication Types

Select...
4
4
1

Relationship

0
9

Authors

Journals

citations
Cited by 29 publications
(11 citation statements)
references
References 12 publications
0
10
0
1
Order By: Relevance
“…The literature also contains reports on HOG implementations in FPGAs, especially for pedestrian detection [18][19][20][21][22][23][24][25][26][27][28][29]. For us, it is interesting to note that they also include some previously introduced simplifications of HOG calculation, which are mostly implementation-related simplifications, rather than intrinsic algorithm changes.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…The literature also contains reports on HOG implementations in FPGAs, especially for pedestrian detection [18][19][20][21][22][23][24][25][26][27][28][29]. For us, it is interesting to note that they also include some previously introduced simplifications of HOG calculation, which are mostly implementation-related simplifications, rather than intrinsic algorithm changes.…”
Section: Related Workmentioning
confidence: 99%
“…For us, it is interesting to note that they also include some previously introduced simplifications of HOG calculation, which are mostly implementation-related simplifications, rather than intrinsic algorithm changes. Such changes include the usage of lookup tables (LUTs) for obtaining the square root, replacement of several multiplications by shifting operations, as well as using for normalization the closest power-of-two number [21,22]. In [18] the authors present in detail the implementation of HOG and SVM, for person detection, on an FPGA.…”
Section: Related Workmentioning
confidence: 99%
“…In the area of FPGA emulations, Kadota et al [12] proposed a simplified HOG calculation and designed the HOG hardware with Altera Stratix II FPGA. Hemmati et al [13] applied Xilinx Zynq-7000 FPGA to design the HOG calculation speed up to 60 FPS under 1920 × 1080 HDTV resolutions. Although the speed in above research could reach real-time, it was merely the calculation result of a single HOG, but ignored the connection and the computing time of the rest functional modules required for data input/output and applied them to the entire set of human detection system.…”
Section: Introductionmentioning
confidence: 99%
“…To date, there are many papers on FPGA-based HOG that implemented in Xillix FPGA for high-speed and highaccuracy human detection systems [6][7][8][9][10]. In previous work [11], we have applied the FPGA-based human recognition in an image, we employed ALTERA DE2-115.…”
Section: Introductionmentioning
confidence: 99%