HMC-Sim-2.0: A Simulation Platform for Exploring Custom Memory Cube Operations

Leidel, John D.; Chen, Yong

doi:10.1109/ipdpsw.2016.43

Cited by 24 publications

(14 citation statements)

References 5 publications

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“…Year Category NMC capabilities Sinuca [60] 2015 Cycle-Accurate Yes HMC-SIM [61] 2016 Cycle-Accurate Limited CasHMC [62] 2016 Cycle-Accurate No SMC [44] 2016 Cycle-Accurate Yes CLAPPS [56] 2017 Cycle-Accurate Yes the early design stage, system architects are faced with large design choices which range from semiconductor physics, to circuit level, micro-architectural properties (eg., issue width, branch prediction), cooling concerns, and other system design constrains [57]. During the first stage of design-space exploration analytic models can provide quick estimate number.…”

Section: Simulatormentioning

confidence: 99%

A Review of Near-Memory Computing Architectures: Opportunities and Challenges

Singh¹,

Chelini²,

Corda³

et al. 2018

2018 21st Euromicro Conference on Digital System Design (DSD)

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Section: Simulatormentioning

confidence: 99%

A Review of Near-Memory Computing Architectures: Opportunities and Challenges

Singh¹,

Chelini²,

Corda³

et al. 2018

2018 21st Euromicro Conference on Digital System Design (DSD)

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“…Most PIM simulators use a specific type of 3D memories, the Hybrid Memory Cube (HMC). Despite the exploration of CAM and HMC simulators that support full-system simulation [Oliveira et al 2017, Leidel and Chen 2016, Jeon and Chung 2017, Xu et al 2019, Paulo and Lima 2019, these are not compatible with associative algorithms.…”

Section: Related Workmentioning

confidence: 99%

“…In the literature, some simulators provide cycle-accurate PIM simulation using HMC. HMC-Sim [Leidel and Chen 2016] offers to the users an infrastructure of experiments with HMC 1.0 and 2.0, implementing a model to replace traditional thread mutexes with custom HMC mutex commands. In addition, the extension of HMC-Sim enables the users to craft Custom Memory Cube (CMC) operations and the evaluation of their efficacy through user applications.…”

Section: Related Workmentioning

confidence: 99%

RV-Across: An Associative Processing Simulator

Silveira

Felzmann

Filho

et al. 2020

Anais Do XXI Simpósio Em Sistemas Computacionais De Alto Desempenho (SSCAD 2020)

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Associative Processing provides high-performance and energyefﬁcient parallel computation using a Content-Addressable Memory (CAM). Emerging big data applications can be signiﬁcantly sped-up by Associative Processing, but validation and evaluation are key challenges. We present RVAcross, a RISC-V Associative Processing Simulator for testing, validation, and modeling associative operations. RV-Across eases the design of associative and near-memory processing architectures by offering interfaces to both building new operations and providing high-level experimentation. Our simulator records memory and registers states of each associative operation pass, giving the user visibility and control over the simulation. The user can employ the simulation statistics provided by RV-Across to compute performance and energy metrics. RV-Across implements common associative operations and provides a framework to allow for easy extension. We show how the simulator works by experimenting with different scenarios for associative operations with three applications that test the functionality of logic and arithmetic computations: matrix multiply, checksum, and bitcount. Our results highlight the direct relation between the data length and potential performance improvement of associative processing in comparison to regular CPU serial and parallel operation. In case of matrix multiplication, the speed-up increases linearly with matrices dimension, achieving 8X for 200x200 bytes matrices and overcoming parallel execution in an 8-core CPU.

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“…Year Category NMC capabilities Sinuca [88] 2015 Cycle-Accurate Yes HMC-SIM [89] 2016 Cycle-Accurate Limited CasHMC [90] 2016 Cycle-Accurate No SMC [31] 2016 Cycle-Accurate Yes CLAPPS [82] 2017 Cycle-Accurate Yes Ramulator-PIM [91] 2019 Cycle-Accurate Yes 2) Simulation Based Modeling allows to achieve more accurate performance numbers. Architects often resort to modeling the entire micro-architecture precisely.…”

Section: Simulatormentioning

confidence: 99%

Near-memory computing: Past, present, and future

Singh

Chelini

Corda

et al. 2019

Microprocessors and Microsystems

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The conventional approach of moving data to the CPU for computation has become a significant performance bottleneck for emerging scale-out data-intensive applications due to their limited data reuse. At the same time, the advancement in 3D integration technologies has made the decade-old concept of coupling compute units close to the memory -called nearmemory computing (NMC) -more viable. Processing right at the "home" of data can significantly diminish the data movement problem of data-intensive applications.In this paper, we survey the prior art on NMC across various dimensions (architecture, applications, tools, etc.) and identify the key challenges and open issues with future research directions. We also provide a glimpse of our approach to near-memory computing that includes i) NMC specific microarchitecture independent application characterization ii) a compiler framework to offload the NMC kernels on our target NMC platform and iii) an analytical model to evaluate the potential of NMC.

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HMC-Sim-2.0: A Simulation Platform for Exploring Custom Memory Cube Operations

Cited by 24 publications

References 5 publications

A Review of Near-Memory Computing Architectures: Opportunities and Challenges

A Review of Near-Memory Computing Architectures: Opportunities and Challenges

RV-Across: An Associative Processing Simulator

Near-memory computing: Past, present, and future

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