HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis

Wei, Zhigang; Arora, Aman; Li, Ruihao; John, Lizy

doi:10.1109/asap57973.2023.00040

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Cited by 3 publications

References 12 publications

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GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models

Fu,

Zhang,

et al. 2023

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

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GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models

Fu,

Zhang,

et al. 2023

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

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HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond

Abi-Karam,

Sarkar,

Seigler

et al. 2024

Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD

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A High-Performance and Ultra-Low-Power Accelerator Design for Advanced Deep Learning Algorithms on an FPGA

Gundrapally,

Shah,

Alnatsheh

et al. 2024

Electronics

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This article addresses the growing need in resource-constrained edge computing scenarios for energy-efficient convolutional neural network (CNN) accelerators on mobile Field-Programmable Gate Array (FPGA) systems. In particular, we concentrate on register transfer level (RTL) design flow optimization to improve programming speed and power efficiency. We present a re-configurable accelerator design optimized for CNN-based object-detection applications, especially suitable for mobile FPGA platforms like the Xilinx PYNQ-Z2. By not only optimizing the MAC module using Enhanced clock gating (ECG), the accelerator can also use low-power techniques such as Local explicit clock gating (LECG) and Local explicit clock enable (LECE) in memory modules to efficiently minimize data access and memory utilization. The evaluation using ResNet-20 trained on the CIFAR-10 dataset demonstrated significant improvements in power efficiency consumption (up to 22%) and performance. The findings highlight the importance of using different optimization techniques across multiple hardware modules to achieve better results in real-world applications.

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HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis

Cited by 3 publications

References 12 publications

GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models

GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models

HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond

A High-Performance and Ultra-Low-Power Accelerator Design for Advanced Deep Learning Algorithms on an FPGA

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