2022 32nd International Conference on Field-Programmable Logic and Applications (FPL) 2022
DOI: 10.1109/fpl57034.2022.00022
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HiPR: High-level Partial Reconfiguration for Fast Incremental FPGA Compilation

Yuanlong Xiao
1
,
Aditya Hota
2
,
Dongjoon Park
3
et al.
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Cited by 4 publications
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