HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems

Rathore, Vijeta; Chaturvedi, Vivek; Singh, Amit Kumar; Srikanthan, Thambipillai; Rohith, R; Lam, Siew-Kei; Shaflque, Muhammad

doi:10.23919/date.2018.8342153

Cited by 13 publications

(9 citation statements)

References 20 publications

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“…Rathore et al 20 on the other hand, proposed a HiMap, a hierarchical mapping approach which reduces the lifetime of nodes by mapping application to healthier nodes whilst also placing dark nodes amongst the selected region. This mapping approach considers Process Variation when assessing the ageing and reliability of the node.…”

Section: Related Workmentioning

confidence: 99%

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ABENA: An Ageing before Temperature Electromigration-Aware Neighbour Allocation for Many-Core Architectures

Ofori-Attah

Agyeman

2021

2021 4th International Conference on Data Storage and Data Engineering

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The percentage of inactive nodes or dark nodes (we refer to dark nodes as dumso) in many-core systems increases because of power dissipation caused by continuous scaling in technology. To address this challenge, existing work employ several techniques. Some techniques place the dumso nodes strategically between active nodes to alleviate the temperature by choosing the nodes which are far away from each other. However, this increases the latency between nodes which require inter communication leading to performance degradation. Others employ Dynamic Thermal Management (DTM) to vary the Voltage Frequency (V/F) Scaling of the nodes whilst Task migration is used to migrate tasks. In this paper, an Ageing Before Temperature Eletromigration-Aware Neighbour Allocation (ABENA) is proposed to alleviate the temperature of the nodes by using the Lifetime of nodes as the main parameter. Experiments show that our approach improves the lifetime of nodes.

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Section: Related Workmentioning

confidence: 99%

“…Unlike existing literature which utilises dark nodes between applications, ABENA utilises dark nodes between tasks. Similar to, 20 at the end of every each epoch, applications are mapped to healthy nodes.…”

Section: Flow Node: Inter-clusteringmentioning

confidence: 99%

ABENA: An Ageing before Temperature Electromigration-Aware Neighbour Allocation for Many-Core Architectures

Ofori-Attah

Agyeman

2021

2021 4th International Conference on Data Storage and Data Engineering

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“…Therefore, several approaches (e.g. [1], [6], [7], [9], [15], [22]) defined an advanced reliability-driven task mapping balancing performance and lifetime reliability. Among the approaches dealing with task-graph applications (e.g., [1], [9], [22]), one of the most comprehensive proposals is presented in [7], where the run-time policy concurrently maps incoming application task-graphs and acts on DVFS and PCPG to optimize performance while satisfying both the power constraints due to the dark silicon and the given lifetime target.…”

Section: Related Workmentioning

confidence: 99%

“…Taking all these elements under control is an extremely complex task. We noticed that most of the previous approaches [1], [6], [7], [9], [15], [22] focus on aging mechanisms but thermal cycling. Thermal cycling is the only mechanism not only depending on temperature levels but also on the amplitude and the frequency of the temperature variations [4]; as a result thermal cycling is a critical reliability issue [2].…”

Section: Introductionmentioning

confidence: 99%

Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip

Haghbayan

Miele

Zouv

et al. 2020

2020 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Dynamic Reliability Management (DRM) is a common approach to mitigate aging and wear-out effects in multi-/many-core systems. State-of-the-art DRM approaches apply finegrained control on resource management to increase/balance the chip reliability while considering other system constraints, e.g., performance, and power budget. Such approaches, acting on various knobs such as workload mapping and scheduling, Dynamic Voltage/Frequency Scaling (DVFS) and Per-Core Power Gating (PCPG), demonstrated to work properly with the various aging mechanisms, such as electromigration, and Negative-Bias Temperature Instability (NBTI). However, we claim that they do not suffice for thermal cycling. Thus, we here propose a novel thermal-cycling-aware DRM approach for shared-memory many-core systems running multi-threaded applications. The approach applies a fine-grained control capable at reducing both temperature levels and variations. The experimental evaluations demonstrated that the proposed approach is able to achieve 39% longer lifetime than past approaches.

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“…T ECHNOLOGY scaling has ushered in the era of manycore systems [1]. Along with the increase of number of cores in a chip, it was reported in [2] that most computing systems have low utilization rates, often lower than 50%, which is partially attributed to the fact that the applications supposedly to be running on these cores actually arrive at drastically varying rates, and some or all of the cores need to be frequently shut down to save energy.…”

Section: Introductionmentioning

confidence: 99%

Dynamic Allocation/Reallocation of Dark Cores in Many-Core Systems for Improved System Performance

et al. 2020

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A significant number of processing cores in any many-core systems nowadays and likely in the future have to be switched off or forced to be idle to become dark cores, in light of ever increasing power density and chip temperature. Although these dark cores cannot make direct contributions to the chip's throughput, they can still be allocated to applications currently running in the system for the sole purpose of heat dissipation enabled by the temperature gradient between the active and dark cores. However, allocating dark cores to applications tends to add extra waiting time to applications yet to be launched, which in return can have adverse implications on the overall system performance. Another big issue related to dark core allocation stems from the fact that application characteristics are prone to undergo rapid changes at runtime, making a fixed dark core allocation scheme less desirable. In this paper, a runtime dark core allocation and dynamic adjustment scheme is thus proposed. Built upon a dynamic programming network (DPN) framework, the proposed scheme attempts to optimize the performance of currently running applications and simultaneously reduce waiting times of incoming applications by taking into account both thermal issues and geometric shapes of regions formed by the active/dark cores. The experimental results show that the proposed approach achieves an average of 61% higher throughput than the two state-of-the-art thermal-aware runtime task mapping approaches, making it the runtime resource management of choice in many-core systems. INDEX TERMS Dark core, many-core, dynamic resource allocation, throughput optimization.

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HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems

Cited by 13 publications

References 20 publications

ABENA: An Ageing before Temperature Electromigration-Aware Neighbour Allocation for Many-Core Architectures

ABENA: An Ageing before Temperature Electromigration-Aware Neighbour Allocation for Many-Core Architectures

Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip

Dynamic Allocation/Reallocation of Dark Cores in Many-Core Systems for Improved System Performance

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