2010 Symposium on VLSI Technology 2010
DOI: 10.1109/vlsit.2010.5556216
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Highly reliable vertical NAND technology with biconcave shaped storage layer and leakage controllable offset structure

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Cited by 32 publications
(18 citation statements)
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“…The gate-last process of TCAT cells results in a biconcave memory cell shape, which reduces the charge spreading issue. Indeed, in BiCS architectures, since the trapping layer is electrically connected in a continuous way along the channel side, there is a significant charge spreading path resulting in potential reliability issues [28]. …”
Section: Tcat Architecturementioning
confidence: 99%
“…The gate-last process of TCAT cells results in a biconcave memory cell shape, which reduces the charge spreading issue. Indeed, in BiCS architectures, since the trapping layer is electrically connected in a continuous way along the channel side, there is a significant charge spreading path resulting in potential reliability issues [28]. …”
Section: Tcat Architecturementioning
confidence: 99%
“…2, this causes degradation of data retention characteristics. Thanks to the biconcave shape of the charge trap layer, in the TCAT case it is harder for electrical charges to move from one cell to another, as there is not straight connection of the charge trap layers between them [18]. …”
Section: Vsat and A-vsatmentioning
confidence: 99%
“…Typical P/E window of TCAT Cho et al 2010). Similar to BiCS, smaller radius helps to create larger memory window due to the field enhancement effect.…”
Section: Fig 419mentioning
confidence: 99%