2015
DOI: 10.1063/1.4927274
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Highly reliable photosensitive organic-inorganic hybrid passivation layers for a-InGaZnO thin-film transistors

Abstract: We report the fabrication of a photosensitive hybrid passivation material on amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) that greatly enhance its stability and improve its electrical characteristics. The hybrid passivation based on polysilsesquioxane is transparent and fabricated using a simple solution process. Because the passivation is photosensitive, dry etching was never performed during TFT fabrication. TFTs passivated with this material had a small threshold voltage shift of 0.5 V during pos… Show more

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Cited by 22 publications
(24 citation statements)
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“…This a -IZO deposition step was repeated to make five layers for the a -IZO channel with a total thickness of ≈70 nm where after the deposition of the last layer, postbaking at 300 °C was extended to 1 h. Patterning, photolithography, and wet etching using 0.01 M HCl were then performed to form the a -IZO islands. A single layer of F-PSQ (99% transparent at 400 nm, dielectric constant = 3.0, breakdown voltage = 2.9 MV cm –1 , leakage current at 2 MV cm –1 = 10 nA cm –2 ) with a thickness ≈200 nm as the gate insulator was then spin-coated, prebaked at 130 °C for 90 s, and cured at 300 °C for 1 h. Another five layers of a -IZO were deposited, as previously discussed. After another patterning and photolithography, the top a -IZO layer was etched using 0.01 M HCl.…”
Section: Methodsmentioning
confidence: 99%
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“…This a -IZO deposition step was repeated to make five layers for the a -IZO channel with a total thickness of ≈70 nm where after the deposition of the last layer, postbaking at 300 °C was extended to 1 h. Patterning, photolithography, and wet etching using 0.01 M HCl were then performed to form the a -IZO islands. A single layer of F-PSQ (99% transparent at 400 nm, dielectric constant = 3.0, breakdown voltage = 2.9 MV cm –1 , leakage current at 2 MV cm –1 = 10 nA cm –2 ) with a thickness ≈200 nm as the gate insulator was then spin-coated, prebaked at 130 °C for 90 s, and cured at 300 °C for 1 h. Another five layers of a -IZO were deposited, as previously discussed. After another patterning and photolithography, the top a -IZO layer was etched using 0.01 M HCl.…”
Section: Methodsmentioning
confidence: 99%
“…Many efforts have already been made to realize solution-processed oxide TFTs. However, majority has only employed solution-based deposition methods for specific layers in the TFT, especially the channel layer. To fully realize cost-efficient and large-area production, all layers need to be fabricated through solution process.…”
Section: Introductionmentioning
confidence: 99%
“…[ 40,41 ] The device performance can be maintained by the introduction of a proper passivation layer on top of a semiconducting layer. [ 41,42 ] In both LiZnO and COOH-SWNT/ LiZnO TFTs, the mobilities were slightly degraded by about 3% while being stored in air for two weeks ( Figure S4, Supporting Information). Note that in our device architecture (top contact, bottom gate), the channel layers are exposed in air.…”
mentioning
confidence: 99%
“…Further progress in CNT‐incorporated oxide semiconductors could be made by developing a method to synthesize the well‐dispersible CNTs with nonpolar functional groups, which do not act as trap sites, in semiconducting layers. It has been known that the properties of oxide semiconductors can be affected by the oxygen and H 2 O molecules in ambient atmosphere, resulting in the variation of electrical characteristics of oxide TFTs for a prolonged time in air . The device performance can be maintained by the introduction of a proper passivation layer on top of a semiconducting layer .…”
mentioning
confidence: 99%
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