Highly reliable CMOS-integrated 11MPixel SiGe-based micro-mirror arrays for high-end industrial applications

Haspeslagh, L.; Coster, J. De; Pedreira, O. Varela; Wolf, Ingrid De; Bois, Bert Du; Verbist, Agnes; Hoof, R. Van; Willegems, Myriam; Locorotondo, S.; Bryce, George; Vaes, Jan; Drieenhuizen, Bert van; Witvrouw, Ann

doi:10.1109/iedm.2008.4796779

Cited by 29 publications

(22 citation statements)

References 6 publications

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“…We used poly-SiGe as the structural material as it has been demonstrated to be an ideal material for a MEMS-last monolithic process. Since, poly-SiGe films (deposition temperature ~ 450˚ C) with very good electrical and mechanical properties can be obtained at CMOS-compatible temperatures [11], it is highly suited for applications that need arrays of MEMS devices to be individually connected to the interfacing circuits [12]. Our device consists of a poly-SiGe based 2D MEMS grating built from an anchored membrane with symmetrically distributed square shaped perforations which are filled with fixed islands.…”

Section: *Manuscript Click Here To View Linked Referencesmentioning

confidence: 99%

A 2D MEMS grating based CMOS compatible poly-SiGe variable optical attenuator

Rudra

Hoof

Coster

et al. 2013

Microelectronic Engineering

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A variable optical attenuator based on a 2D MEMS grating is described. The device is a perforated and suspended poly-SiGe membrane with fixed islands within the perforations. It specularly reflects light in the non-actuated state, whereas after actuation the membrane deflects downwards forming a grating which diffracts light in higher orders reducing the intensity of the specular reflection. Using a laser of 400 nm wavelength, we could obtain an attenuation level of 20 dB with 0.11 dB of polarization dependent loss. A close match was obtained between the experimental and simulated mechanical behavior of the device showing the possibility of efficiently extending its use in the NIR regime. Additionally, as the device is made of poly-SiGe deposited at low temperature, it can be monolithically integrated with CMOS in the future. Dear Editorial Board of Microelectronic Engineering,Please find enclosed the manuscript named "A 2D MEMS grating based CMOS compatible poly-SiGe variable optical attenuator" by S. Rudra et al. All co-authors have seen and agreed with the contents of the manuscript. We certify that the submission is original work and is not under review at any other publication.This work deals with novel 2D MEMS gratings made of Poly-SiGe, a novel material which can help in monolithically integrating MEMS directly on top of CMOS. It can appreciably reduce the cost and device dimension though the functionality increases manifold. We used the concept of 2D gratings in forming variable optical attenuators with applications mainly targeted towards optical communication. We showed a maximum attenuation level of ~20 dB at an applied voltage of 1.6 V. As the devices are based on symmetric 2D gratings, there is no polarization sensitivity for the diffracted light and hence we could obtain a maximum PDL of 0.11 dB at the highest attenuation level. We also tailored the design parameters to obtain a critical damped response for the devices showing a fast response time of 3.3 µs. Though the characterizations were performed with 400 nm laser, with proper simulations and explanations we support the efficient extension of its working range in the NIR regime. Supported by the SiGe technology, this can be a step forward in efficiently integrating large arrays of VOAs on a single silicon chip.To our knowledge, this is the first 2D MEMS grating based VOA discussed thoroughly in literature. Hence, we hope that the editorial board and the reviewers will agree to the interest of this study. The authors report an alternative design for a Variable Optical Attenuator based on a MEMS structure. The device consists of a suspended poly-SiGe membrane with fixed islands within the holes of the photonic device. The reflectivity of the membrane can be tuned by electrostatic actuation of the membrane, which deflects downwards. This deflection forms a diffraction grating, reducing the specular reflection. Here are my comments:-The paper is divided into different sections, after a brief introduction the authors introduce a conceptua...

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Section: *Manuscript Click Here To View Linked Referencesmentioning

confidence: 99%

A 2D MEMS grating based CMOS compatible poly-SiGe variable optical attenuator

Rudra

Hoof

Coster

et al. 2013

Microelectronic Engineering

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“…Poly-SiGe offers much better integration possibilities: it can be deposited at temperatures compatible with above-CMOS processing, while it has comparable properties to poly-Si and can be processed using similar state-of-the-art tools [5]. [6].…”

Section: Introductionmentioning

confidence: 99%

“…1) [6]. These arrays, consisting of 8ptm x 8ptm pixels with a density which is almost double compared to the state-of-the-art [2], are intended to be used as spatial light modulators (SLM) [7,8].…”

Section: Introductionmentioning

confidence: 99%

Packaging of 11 MPixel CMOS-Integrated SiGe Micro-Mirror Arrays

Witvrouw

Tilmans

Bogaerts

et al. 2009

2009 IEEE 22nd International Conference on Micro Electro Mechanical Systems

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This article reports for the first time on the packaging of 10 cm2 11 MPixel SiGe micro-mirror arrays, intended to be used as spatial light modulator (SLM). Due to very stringent requirements on mounted die flatness (<0.01 mrad), first-level packaging of the SLM die is done using specially designed SiC holders. To avoid trapped particles between die and holder, which would jeopardize the flatness spec, special backside cleaning of the dies (< 1 0.8 tm particle/cm2) is needed before mounting the SLM die on the holder. To enable this backside cleaning and to avoid front-side particles during dicing, handling and wire bonding, a temporary wafer-level or 0-level packaging cap which can be placed and removed at room temperature was developed. Dynamic white light interferometer measurements of packaged dies showed that 99.5°O of 123,648 mirrors tested are within spec.

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“…The spaces in the patterned DFR act as template for the deposition of copper by electroplating (4). The removal of DFR (5) is followed by a flash etch to remove the Cu seed layer (6). As feature size decreases, several wiring layers and their vertical connections (vias) have to be aligned within smaller tolerances to avoid functional errors.…”

Section: Laser Direct Imaging For Advanced Substrates In Semiconductomentioning

confidence: 99%

High-speed one-dimensional spatial light modulator for Laser Direct Imaging and other patterning applications

et al. 2014

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Fraunhofer IPMS has developed a one-dimensional high-speed spatial light modulator in cooperation with Micronic Mydata AB. This SLM is the core element of the Swedish company's new LDI 5sp series of Laser-Direct-Imaging systems optimized for processing of advanced substrates for semiconductor packaging. This paper reports on design, technology, characterization and application results of the new SLM. With a resolution of 8192 pixels that can be modulated in the MHz range and the capability to generate intensity gray-levels instantly without time multiplexing, the SLM is applicable also in many other fields, wherever modulation of ultraviolet light needs to be combined with high throughput and high precision.

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Highly reliable CMOS-integrated 11MPixel SiGe-based micro-mirror arrays for high-end industrial applications

Cited by 29 publications

References 6 publications

A 2D MEMS grating based CMOS compatible poly-SiGe variable optical attenuator

A 2D MEMS grating based CMOS compatible poly-SiGe variable optical attenuator

Packaging of 11 MPixel CMOS-Integrated SiGe Micro-Mirror Arrays

High-speed one-dimensional spatial light modulator for Laser Direct Imaging and other patterning applications

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