Highly efficient and linear class-E CMOS digital power amplifier using a compensated Marchand balun and circuit-level linearization achieving 67% peak DE and −40dBc ACLR without DPD

Hashemi, Mohsen; Zhou, Lei; Shen, Yiyu; Mehrpoo, Mohammadreza; Vreede, Leo de

doi:10.1109/mwsym.2017.8059066

Cited by 4 publications

(6 citation statements)

References 7 publications

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“…As explained in IV-A, a digital Doherty PA is in fact so nonlinear that even with an ideal DPD, the nonlinearity lowers the effective number of bits, thus reducing the dynamic range of the output signal [32]. In this work, the digital-PAs are made intrinsically linear by using three different circuit-level techniques: nonlinear sizing and overdrive-voltage control for ACW-AM correction, and multiphase RF-clocking for ACW-PM correction [16]- [18]. Therefore, not only the burden on DPD for strict cellular wireless standards is reduced, but also the ACW-AM and ACW-PM distortions are corrected well enough to pass the WiFi mask even without using DPD.…”

Section: Circuit-level Linearizationmentioning

confidence: 99%

“…Shen (DPA), implemented as an array of small sub-PA cells, is therefore a logical candidate for such a transmitter, as it can be directly driven by digital (i.e. square-wave) signals [8]- [18].…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, as will be discussed in section IV, even with an ideal DPD, due to the highly nonlinear operation mode of class-E digital-PAs, it is not possible to achieve maximum spectral purity and minimum error-vector-magnitude (EVM) for a given number of bits with a conventional uniform digital-PA structure [32]. The bandwidth of the digital AM signal is mostly limited by the sampling rate and not by analog blocks as in an analog-intensive polar TX [33], [34] thus, it can handle a higher signal bandwidth [9]- [12], [16]- [18], [29], [30]. In addition to high video bandwidth, high RF bandwidth is also of great importance.…”

Section: Introductionmentioning

confidence: 99%

“…In addition to high video bandwidth, high RF bandwidth is also of great importance. There are three main challenges in increasing the RF bandwidth of a class-E Doherty PA, namely: class-E PA limited bandwidth, impedance converter limited bandwidth, and the balun limited bandwidth, which can be mitigated using three different techniques, namely: reactance compensation [35], a shunt open-circuit λ/8 section [26], [31], [36] parallel to the load, and compensated Marchand balun with re-entrant coupled lines [18], [37]- [39], respectively.…”

Section: Introductionmentioning

confidence: 99%

“…Wideband efficiency enhancement is achieved by using reactance-compensated parallel-circuit class-E along with wideband impedance inverter and a novel wideband Marchand balun-based Doherty power combiner, implemented using re-entrant coupled lines with independent 2 nd harmonic control. Nonlinear sizing, multiphase RF-clocking and overdrive-voltage control been recently successfully used to linearize single PAs with both on-chip [16], [17] and off-chip [18] matching networks in circuit level without using DPD.…”

Section: Introductionmentioning

confidence: 99%

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A Highly Linear Wideband Polar Class-E CMOS Digital Doherty Power Amplifier

Hashemi

Zhou²,

Shen

et al. 2019

IEEE Trans. Microwave Theory Techn.

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This paper presents the first application of a digital-intensive intrinsically linear digitally-controlled class-E technique in a Doherty configuration. By careful nonlinear segmentation and multiphase RF-clocking along with overdrive-voltage control and automatic duty-cycle correction, it is shown that even the nonlinearities related to Doherty operation can be fully handled by the underlying design such that digital predistorion DPD can be in principle omitted. The nonlinearity behaviour of the whole digital Doherty PA is analyzed and closed-form equations are given to predict the AM-AM and AM-PM curves. In addition, time/phase mismatch between the Peak and Main branches and the AM and PM signals are accurately compensated. In order to achieve maximum intrinsic linearity, two separate chips with the same architecture, but different design parameters, are fabricated as the Main and Peak amplifiers in 40nm bulk CMOS. To achieve a large RF bandwidth and high passive combiner efficiency, a differential low-loss, wideband Marchand balun-based Doherty power combiner, implemented using re-entrant coupled lines with independent 2 nd harmonic control is proposed, and together with the matching network is fabricated on a two-layer PCB. The measured peak / 6 dB power-back-off P OUT , drain efficiency / power-added efficiency at 2.4 GHz are 17.5 / 12.2 dBm, 57 / 52 % and 36 / 25 % with VDD Main / Peak = 0.6 / 0.7 V. Measured results without using DPD show-41 dBc ACPR and-36 dB EVM for a 16 MHz OFDM signal at 2.5GHz. By using DPD, the measured ACPR and EVM of a 16 / 32 MHz OFDM signals are-52 /-48 dBc and-50 /-48 dB respectively.

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Section: Circuit-level Linearizationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A Highly Linear Wideband Polar Class-E CMOS Digital Doherty Power Amplifier

Hashemi

Zhou²,

Shen

et al. 2019

IEEE Trans. Microwave Theory Techn.

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A Wideband Energy-Efficient Multi-Mode CMOS Digital Transmitter

Beikmirza

Shen

Vreede

et al. 2023

IEEE J. Solid-State Circuits

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This article presents a wideband, energy-efficient digital transmitter (DTX) suitable for multi-mode/multi-band wireless communication applications. It features various operation modes comprising Cartesian (Modes-1/-2) and multi-phase (Modes-3/-4) configurations utilizing LO clocks with different duty cycle in the interleaving/non-interleaving configurations. The multi-phase operation compromises polar and Cartesian features by mapping the I/ Q signals into two non-orthogonal basis vectors with a 45 • relative phase difference and a 3-bit phase selector scheme. The different operation modes are extensively analyzed and compared. Fabricated in a 40-nm CMOS process with an off-chip matching network, the proposed DTX occupies a core area of 0.72 mm 2 and delivers 23.18-dBm RF peak power at 2.1 GHz from a 0.95-V supply voltage with drain/system efficiencies of 66.26%/52.59%, respectively. Utilizing a simple memory-less digital pre-distortion (DPD) for a 160-MHz four-channel 64-quadrature amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal, the DTX delivers an average P Out of 13.5/11.4/7.7/9.4 dBm, achieving an adjacent channel leakage (power) ratio (ACL(P)R) of better than −42/−40/−40/−38 dBc and an average error vector magnitude (EVM) of −36/−34/−34/−32 dB, operating in Modes-1/-2/-3/-4, respectively. While transmitting a 200-MHz single-channel 256 (1024)-QAM OFDM signal at 2.4 GHz in Modes-1/-4, the average delivered output power is 14.11/9.29 (12.23/7.32) dBm with average drain and system efficiencies of 33.17%/26.3% (23.82%/22.83%) and 24.81%/22.85% (19.34%/18.81%), while the ACLR and EVM are better than −42/−41 (−43/−43) dBc and −34.6/−33.1 (−33.5/−33.9) dB, respectively.

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