High Volume Scan FA for Yield Enhancement at the 90nm Node

Abstract

Driving yield improvement activities to decrease baseline logic / scan yield fallout is often perceived as a challenging or complex activity. Much of this perception is based on yield or device teams historical interactions with the FA teams on these types of requests. This paper will present our methodology for generating a relatively high volume of scan FA results in a short time frame. This type of high volume scan FA enables real time FA paretos of what is causing scan / logic yield loss.