2019
DOI: 10.4028/www.scientific.net/msf.963.688
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High-Voltage SiC-JFET Fabrication and Full Characterization

Abstract: 3.3 kV Power JFETs have been designed, fabricated and measured in the framework of the FilSiC project. The paper presents the main characterization results with classical static and dynamic xmeasurements as well as double pulse tests for switching characterization. The study is completed by a data-sheet evaluation for the measured components and an evaluation of the associated safe operating area.

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Cited by 1 publication
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“…CHSAT P bi GS (20) the channel current is zero, in particular for 1   . Therefore, in the symmetric case, the classical condition of the blocking operation is expressed in the form of:…”
Section: Analysis and Modeling Of The Asymmetric Lateral Channel Of T...mentioning
confidence: 99%
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“…CHSAT P bi GS (20) the channel current is zero, in particular for 1   . Therefore, in the symmetric case, the classical condition of the blocking operation is expressed in the form of:…”
Section: Analysis and Modeling Of The Asymmetric Lateral Channel Of T...mentioning
confidence: 99%
“…Compared with the SiC MOSFET, SiC VJFET received a lot of attention because of its threshold voltage (V th ) stability for different temperature values, since no reliability issues appear with gate oxide on contrary to SiC MOSFETs [5][6][7]. Different structures of the SiC VJFET device have been developed and studied [16][17][18][19][20][21][22][23][24][25]. Among of them, in this paper, the SiC LC-VJFET of Figure 1 [16,20] is investigated under a physical model of the threshold voltage.…”
Section: Introductionmentioning
confidence: 99%
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