Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's 2007
DOI: 10.1109/ispsd.2007.4294967
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High Voltage LDMOS Transistors utilizing a Triple Well Architecture

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Cited by 3 publications
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“…RESURF technique (Ludikhuize, 2000) further enhances the efficiency of the device by increasing the breakdown voltage level. Other approaches could also be used for increasing the breakdown voltage and reduce the on-resistance R on , such as double RESURF technique by using internal field rings, buried layers, triple well architecture and super-junction LDMOS transistors (Hossain et al, 2002;Nezar and Salama, 1991;Liaw et al, 2007;Puchner et al, 2007;Park and Salama, 2006). In literature, one can also find thin-film single-crystal silicon LDMOS structures but they use either Silicon on Insulator (SOI) (Akarvardar et al, 2007;Luo et al, 2003;Bawedin et al, 2004) or Silicon on Sapphire (SOS) (Roig et al, 2004) technologies.…”
Section: Introductionmentioning
confidence: 99%
“…RESURF technique (Ludikhuize, 2000) further enhances the efficiency of the device by increasing the breakdown voltage level. Other approaches could also be used for increasing the breakdown voltage and reduce the on-resistance R on , such as double RESURF technique by using internal field rings, buried layers, triple well architecture and super-junction LDMOS transistors (Hossain et al, 2002;Nezar and Salama, 1991;Liaw et al, 2007;Puchner et al, 2007;Park and Salama, 2006). In literature, one can also find thin-film single-crystal silicon LDMOS structures but they use either Silicon on Insulator (SOI) (Akarvardar et al, 2007;Luo et al, 2003;Bawedin et al, 2004) or Silicon on Sapphire (SOS) (Roig et al, 2004) technologies.…”
Section: Introductionmentioning
confidence: 99%