High voltage, high current GaN-on-GaN p-n diodes with partially compensated edge termination

IEEE Electron Device Lett.

McCarthy

Youtsey

et al. 2018

Self Cite

High-performance vertical GaN-based p-n junction diodes fabricated using bandgap selective photoelectrochemical etching-based epitaxial liftoff (ELO) from bulk GaN substrates are demonstrated. The epitaxial GaN layers and pseudomorphic InGaN release layer were grown by MOCVD on bulk GaN substrates. A comparison study was performed between devices after liftoff processing (after transfer to a Cu substrate) and nominally identical control devices on GaN substrates without the buried release layer or ELO-related processing. ELO and bonded devices exhibit nearly identical electrical performance and improved thermal performance, compared with the control devices on full-thickness GaN substrates. The breakdown voltage, ideality factor, and forward turn-ON performance were found to be nearly identical, indicating that the transfer process does not degrade the quality of the p-n junctions. The devices exhibit turn-ON voltages of 3.1 V at a current density of 100 A/cm 2 , with a specific ON-resistance (R ON) of 0.2-0.5 m • cm 2 at 5 V and a breakdown voltage (V br) of 1.3 kV. Both optical and electrical characterization techniques show that the thermal resistance of ELO devices bonded to a Cu carrier is approximately 30% lower than that for control devices on GaN substrates. Index Terms-GaN p-n junctions, epitaxial lift-off, thermal resistance. I. INTRODUCTION V ERTICAL GaN (and related III-N materials)-based devices are promising for power electronics due to both the exceptional properties of the III-N material system and the advantages of vertical device architectures [1]-[7]. However, vertical GaN-based device performance is often limited due to the use of lattice-mismatched foreign substrates, resulting in high dislocation densities as well as limited thermal conductivity for heat removal [8], [9].

Section: High-voltage Vertical Gan P-n Diodes By Epitaxial Liftoff Frmentioning

confidence: 99%

High-Voltage Vertical GaN p-n Diodes by Epitaxial Liftoff From Bulk GaN Substrates

IEEE Electron Device Lett.

McCarthy

Youtsey

et al. 2018

Self Cite

“…To avoid the mesa sidewall related leakage currents and associated complications described above, fully vertical p‐n diodes with backside cathode contacts and an ion‐implantation‐based edge termination with sputtered SiNx surface passivation layer have been investigated . To compensate the surface p‐type layer, a nitrogen triple implant was used.…”

Section: Methodsmentioning

confidence: 99%

“…A triple nitrogen implant was used to partially compensate the p‐GaN layer, leaving a thin partially compensated edge termination portion in the regime between the anode and the edge termination etch ring (light blue in Figure b). This optimized thin partially compensated p‐GaN (≈45 nm in this work) was used to manage the lateral electric field distribution near the p + ‐n junction to achieve high breakdown voltage, using a similar working principle to that of reduced surface field (RESURF) diodes . A shallow trench ring was etched using inductively coupled plasma reactive ion etching (ICP‐RIE) to establish the outer boundary of the edge termination structure.…”

Section: Methodsmentioning

confidence: 99%

“…To explore the impact and benefits of ELO for GaN power diodes, several device designs and process flows were explored. PN junction diodes with either etched‐mesa isolation or ion‐implant based edge termination were developed and compared to evaluate the impact of ELO processing on device performance and material quality. In this work, we report the demonstration of ion‐implant isolated vertical GaN p‐n diodes lifted off from bulk GaN substrates; these devices show no significant electrical performance penalty compared to devices without ELO processing.…”

Section: Introductionmentioning

confidence: 99%

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Ion‐Implant Isolated Vertical GaN p‐n Diodes Fabricated with Epitaxial Lift‐Off From GaN Substrates

Physica Status Solidi (a)

McCarthy

Youtsey

et al. 2018

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Ion-implant isolated vertical GaN p-n junction diodes fabricated with epitaxial lift-off (ELO) from GaN substrates are demonstrated. For the ELO process, a band-gap selective photoelectrochemical (PEC) wet etch with a pseudomorphic InGaN release layer is utilized. Compared with devices isolated using mesa etching, the ion-implant isolated devices exhibit more ideal forward current-voltage characteristics and lower leakage currents. Devices are also compared with and without ELO processing. Devices measured after ELO processing and mounting to metallized carrier substrates show similar electrical performance to GaN-on-GaN control samples without ELO processing. No indication of material quality degradation is found on the ELO devices. The ELO devices exhibit turn-on voltages of 3.15 V (at a current density of 100 A cm À2 ), with specific on resistance (R on ) of 0.52 mΩ cm 2 at 4.8 V and breakdown voltage (V br ) approximately of 750 V.

“…The critical electric field is related to the onset of avalanche breakdown due to impact ionization, which puts an upper limit on the reverse blocking voltage. Recent p–n diode results on bulk GaN substrates have shown the performance approaching material limits . Detailed impact ionization data in low defect density GaN is needed for device design and applications.…”

Section: Introductionmentioning

confidence: 99%

Avalanche Multiplication Noise in GaN p–n Junctions Grown on Native GaN Substrates

Cao

Physica Status Solidi (b)

et al. 2019

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GaN p–n junction diodes grown on native GaN substrates have been fabricated and characterized. The devices exhibit a positive temperature coefficient of breakdown obtained from variable temperature current–voltage measurements, confirming the impact ionization avalanche. The low‐frequency noise characteristics of these devices have been measured under forward and reverse bias conditions. The forward bias noise spectra are dominated by the 1/f noise, and the current spectral density is proportional to I1.6. Under reverse bias, the noise spectra show 1/f noise at reverse biases below the avalanche threshold. However, at reverse biases in the avalanche regime, the multiplication noise overwhelms the 1/f noise, resulting in a white noise spectrum. To further characterize the avalanche process, the excess noise factor, F, is obtained from the measured noise spectra of diodes biased in reverse avalanche. For the case of pure hole injection (achieved by incorporating a thin pseudomorphic In0.07Ga0.93N layer at the cathode of the device and illuminating with 390 nm UV light), a low excess noise factor is achieved. The impact ionization ratio α/β extracted from the multiplication noise ranges from 0.07 to 0.38 over the electric field ranging from 2.8 to 3.7 MV cm−1, consistent with the impact ionization coefficients reported previously using the photomultiplication method.