High voltage driver IC with improved immunity to di/dt induced substrate noise

Abstract

This paper presents a high reliability high voltage driver integrated circuit (IC), which has been designed and fabricated for half bridge inverter drive of the intelligent power module (IPM). By utilizing the 1.0 µm 650 V high voltage bipolar CMOS DMOS (BCD) on silicon-on-insulator (SOI) process technology combined with modified level shift circuit, the proposed high voltage driver IC offers an improved immunity to di/dt induced substrate noise, with a negative voltage undershoot down to −50 V which is about 1.5 times of the maximum allowable value of the conventional high voltage driver ICs at 100°C, thus delivers higher reliability. Furthermore, this device also needs ultra-low quiescent supply currents and offers high driver capability (source 200 mA, sink 300 mA). In addition, this device can operate at a high temperature up to 175°C and features higher breakdown voltage and lower leakage current than conventional high voltage driver ICs.

A New Design Technique for a High-Speed and High dV/dt Immunity Floating-Voltage Level Shifter

“…Since the level shifter can perform voltage conversion between the low-voltage domain and the high-voltage domain, MH1 and MH2 are high-voltage transistors, whose parasitic capacitance is large. The parasitic capacitance will generate a charging or discharging current when dV/dt happens, which will interfere with the level shifter's normal operation and cause errors in the driver's logic voltage of the high-voltage domain [10][11][12]. In Figure 2, it can be seen that under the action of the bootstrap capacitor C BOOT , VDDH changes with VSSH, and dVDDH/dt is approximately equal to dVSSH/dt.…”

A novel progressive trigger method of di/dt control for MOSFET

“…The rising and falling speed of V gs can be controlled by setting the maximum gate-driven voltage to different values during the device's switching transition [9,10]. A close loop gate driven method is applied for power MOSFET to increase or decrease the speed of V gs [11,12,13,14,15,16,17], in which a feedback circuit is used to sense the device voltage or current slopes for the gate-driven circuit.…”