High-Voltage Drain Extended MOS Transistors for 0.18 um Logic CMOS Process

Abstract

Complementary high-voltage drain extended (DE) MOS transistors were implemented into TI's state-of-the-art production advanced analog and digital 1.5 -1.8V CMOS technology [1, 2]. These transistors allow for 5V drain operating voltage using the core gate oxide and have breakdown voltages, BVdss>10V. Experimental results along with Suprem and Medici simulation results are presented to explain their operation. The novel p-channel transistors use an isolated compensated p-well as a drain extension. The n-channel version uses nwell as a drain extension. Experimental test results of Ids(Vds,Vgs), Igs(Vds), and BV(L) plots demonstrate DE-MOS performance. The work was focused on performance optimization with zero process modification and hence no cost adder.

The World Is Analog

“…A drain-extended NMOS (DENMOS) is shown in Fig. 1.15 [24]. It is integrated in a CMOS process without added complexity (Chap.…”

A low-power 333Mbps mobile-double data rate output driver with adaptive feedback to minimize overshoots and undershoots

“…This leakage is much more in NMOS than PMOS. So this design makes use of I/O DENMOS device [4] that has low GIDL [6] leakage if not cascoded as shown in Fig.4.d.…”

Switch Bootstrapping for Precise Sampling Beyond Supply Voltage

“…The utilized process makes available transistors with thicker gate oxide MOS together with drain-extended MOS (DEMOS), thus giving flexibility in the circuit design. Drain extended MOS transistor structures achieve high drain terminal breakdown using drain diffusion engineering without any requirement for additional mask processing [9]. The above features, together with the design method illustrated earlier enables a proper operation of this circuit with input signals that are as large as 5.5 V. It is also possible to implement the proposed switch with good reliability using only 3.3-V thin oxide devices with cascoding techniques [2], [10].…”

“…If exceeds snap-back voltage, thermal runaway might occur and completely destroy the device. The breakdown voltage of the drain-bulk junction can be increased with a DEMOS structure [9], thanks to the low doping profile resulting from the drain extension, or by exploiting lightly-doped drain (LDD) implants with careful device layouts [2]. For the used technology, the minimum junction breakdown voltage is 9 V and the snap-back voltage is well above 9 V.…”