High vacuum wafer level packaging for high-value MEMS applications

Nicolás, Silvia Martín de; Greco, F.; Caplet, Stéphane; Coutier, C.; Dressler, C.; Audoin, M.; Baillin, Xavier; Dehag, G.; Souchon, Frédéric; Fanget, S.

doi:10.1109/ectc.2014.6897528

2014 IEEE 64th Electronic Components and Technology Conference (ECTC) 2014

DOI: 10.1109/ectc.2014.6897528

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High vacuum wafer level packaging for high-value MEMS applications

Silvia Martín de Nicolás

F. Greco

Stéphane Caplet

et al.

Abstract: In this paper, our latest developments on high vacuum packaging technology at the wafer level are presented. The

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High vacuum wafer level packaging for high-value MEMS applications

Abstract: In this paper, our latest developments on high vacuum packaging technology at the wafer level are presented. The

Cited by 1 publication

References 21 publications

Study on the low-void-ratio vacuum eutectic technology for the Al₂O₃ ceramic circuit substrate

Study on the low-void-ratio vacuum eutectic technology for the Al₂O₃ ceramic circuit substrate

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High vacuum wafer level packaging for high-value MEMS applications

Abstract: In this paper, our latest developments on high vacuum packaging technology at the wafer level are presented. The

Cited by 1 publication

References 21 publications

Study on the low-void-ratio vacuum eutectic technology for the Al2O3 ceramic circuit substrate

Study on the low-void-ratio vacuum eutectic technology for the Al2O3 ceramic circuit substrate

Contact Info

Product

Resources

About

Study on the low-void-ratio vacuum eutectic technology for the Al₂O₃ ceramic circuit substrate

Study on the low-void-ratio vacuum eutectic technology for the Al₂O₃ ceramic circuit substrate