High-Throughput Modular Multiplication and Exponentiation Algorithms Using Multibit-Scan–Multibit-Shift Technique

Design and Evaluation of Novel Effective Montgomery Modular Multiplication Architecture

“…As a result, the performance of modular multiplication algorithm/architecture plays an important role in the performance of the cryptosystems. High-performance cryptosystem is hard to achieve without using the hardware acceleration [11].…”

“…It is because Montgomery modular multiplication replaces the trial division with a series of simple shift and binary addition operations, which are simple in hardware implementations [11]. Although hardware implementation of the binary Montgomery modular multiplication is simple, but it is time-consuming operation.…”

“…Although hardware implementation of the binary Montgomery modular multiplication is simple, but it is time-consuming operation. To improve the performance of Montgomery modular multiplication algorithm and architecture, several hardware implementation method and computational techniques have been developed that can be categories into four groups: using high-radix technique [11][12][13][14][15][16][17], using systolic array architecture [18][19][20], using carry-save addition architecture [11,16,21,22,23], and using scalable architecture [9,12,24,25,26,27].…”

“…Using the high-radix technique, the number of required clock cycle is reduced at the expense of the critical path overhead [11]. Rezai and Keshavarzi proposed the variable Length Montgomery modular multiplication (VLM3) [11], which reduces the critical path overhead. They proposed a new integer representation in [11].…”

“…Rezai and Keshavarzi proposed the variable Length Montgomery modular multiplication (VLM3) [11], which reduces the critical path overhead. They proposed a new integer representation in [11]. Using this new integer representation, the required high-radix partial multiplication is simplified to binary partial multiplication.…”