High-Throughput Bilinear Pairing Processor for Server-Side FPGA Applications
Junichi Sakamoto,
Daisuke Fujimoto,
Riku Anzai
et al.
Abstract:This study focuses on the acceleration of cryptographic pairing operations on field-programmable gate arrays (FPGAs) for server-side applications. Previous studies on FPGA pairing implementations focused on area efficiency for embedded devices, trying to achieve maximum performance with minimal circuit resources. However, their architectures are likely to be inefficient for server-side applications, where the primary interest is maximum performance when FPGA resources are finished. Their architectures are inef… Show more
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