High-temperature Ta diffusion in the grain boundary of thin Cu films

Abstract

In order to ascertain the applicability of the technologically well-established Cu metallization in high-temperature circuits, the authors have investigated layered metal stacks having one Ta/Cu interface at temperatures from 400 to 700 °C. The authors have found that Ta releases from the Ta layer and moves through the Cu film to the opposite interface via the grain boundaries. In the simplest bilayer stack with Cu on top of Ta, the up-diffused Ta on the surface spreads out over the Cu grains so as to cover the Cu grains completely at 650 °C. The activation energy for the grain boundary diffusion is found to be 1.0 ± 0.3 eV. The Ta diffusion in the grain boundaries leads to stabilization of the Cu grain size at 360 nm and an increase in sheet resistance of the metal stack. The latter is in fact observed for all metal stacks having Cu in contact with Ta on one side and TaN or nothing at all on the other. The implication is that the Cu metallization with one Ta/Cu interface has to be stabilized by a preanneal at the highest anticipated operating temperature before use.

Co-W Barrier Layers for Metallization of Copper Interconnects: Thermal Performance Analysis

“…From room temperature up until 500 °C, seen in Figure 4 a–d, there are no appreciable changes to the Cu film surface. Above this temperature, it is possible to see a change in contrast at the surface, Figure 4 e,f, which hints at a possible change in chemical composition, with the possibility of Ta diffusion towards the Cu film surface, as shown in [ 18 ]. Above the 650 °C annealing temperature, it is possible to verify that the chemical composition of the Cu film surface has been altered, as evidenced by the appearance of white dotted regions dispersed throughout the observed surface ( Figure 4 g,h).…”

Correlation between the formation of particle defects on sputtered Cu seed layers and Cu targets

“…(2) sputtering of an adhesion layer; (3) a deposition of a Cu seed layer; (4) electroplating of a Cu bulk; (5) a removal of excessive Cu by chemical mechanical polishing [7][8][9]. Herein, the Cu seed layer is deposited on the adhesion layer by magnetron sputtering, which acts as a cathode during Cu electroplating [10,11].…”

“…Cu is widely used as a standard interconnection material for ULSI because of its low resistivity, high resistance against electromigration, reduced cost of manufacture, and improved yield [4–6]. Currently, the Cu interconnection architectures are fabricated mostly using the so‐called damascene process, which consists of five key steps: (1) a deposition of a thin diffusion barrier layer; (2) sputtering of an adhesion layer; (3) a deposition of a Cu seed layer; (4) electroplating of a Cu bulk; (5) a removal of excessive Cu by chemical mechanical polishing [7–9]. Herein, the Cu seed layer is deposited on the adhesion layer by magnetron sputtering, which acts as a cathode during Cu electroplating [10, 11].…”