High temperature SiC trench gate p-IGBTs

Singh, Ranbir; Ryu, Sei‐Hyung; Capell, D.C.; Palmour, John W.

doi:10.1109/ted.2003.811388

Cited by 36 publications

(9 citation statements)

References 19 publications

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“…In the PECVD system, the SiO 2 films were deposited at 350 °C by using SiH 4 and N 2 O as source gases. The thickness of the deposited SiO 2 layer was about (70)(71)(72)(73)(74)(75) nm for both MOS capacitors and MOSFETs. After deposition, the samples were annealed in N 2 O (10% diluted in N 2 ) at 1300 °C for (0-4) h, followed by N 2 annealing at 1300 °C for 30 min.…”

Section: Deposited Siomentioning

confidence: 99%

“…While high-voltage lateral MOSFETs for power ICs have already been reported [63][64][65][66][67][68][69], the devel-opment of 4H-SiC CMOS circuits is still lacking behind. In addition, an increase in the channel mobility of SiC p-channel MISFETs leads to the improvement of SiC p-channel insulated-gate bipolar transistors (p-IGBTs) [70][71][72] for ultra high-voltage (>5 kV) devices. Therefore, understanding SiC MOS interface properties in the lower half of the bandgap and improving the performance of p-channel SiC MOS-based devices contributes considerably to the development of SiC power devices and circuits as well.…”

Section: Application Of N-containing Insulators To P-channel Mis Capamentioning

confidence: 99%

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4H‐SiC MISFETs with nitrogen‐containing insulators

Noborio

Suda

Beljakowa

et al. 2009

Physica Status Solidi (a)

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4H‐SiC MISFETs with nitrogen‐containing insulators have been fabricated and characterized. Several techniques have been explored to incorporate nitrogen in the gate insulator in order to improve the density of interface states and thereby the channel mobility. The techniques are N2O‐grown oxides, the oxidation of a surface layer co‐implanted with N+ and Al+, deposited SiO2 annealed in N2O and NO, and deposited SiNx /SiO2 annealed in N2O. By optimizing the formation process of the gate insulators, MIS capacitors with N‐containing insulators have demonstrated an interface state density close to the conduction band edge below 2 × 1011 cm–2 eV–1 which is one or two orders‐of‐magni‐ tude lower than that of MOS capacitors with oxides grown in dry O2. The channel mobility of the n‐channel 4H‐SiC(0001) MISFETs with N‐containing insulators is increased to about 30 cm2/Vs. In addition, an even higher channel mobility of 50 cm2/Vs has been realized by utiliz‐ ing N‐containing insulators adequately processed on the 4H‐SiC (000$ \bar 1 $) face. From the experimental results, the dominant scattering mechanisms in SiC MISFETs have been identified; Coulomb scattering and electron trapping at interface states dominate the channel mobility in SiC MOSFETs with thermally‐grown and deposited SiO2. The application of N‐containing insulators to p‐channel 4H‐SiC MIS devices is also discussed. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Section: Deposited Siomentioning

confidence: 99%

Section: Application Of N-containing Insulators To P-channel Mis Capamentioning

confidence: 99%

4H‐SiC MISFETs with nitrogen‐containing insulators

Noborio

Suda

Beljakowa

et al. 2009

Physica Status Solidi (a)

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“…12,13 However, these beneficial results have mainly addressed n-type 4H-SiC, and there have been very few reports on the carrier lifetimes in thick and lightly doped p-type SiC, which is often employed as the voltage-blocking region of highvoltage SiC switching devices such as thyristors 14 and IGBTs. 15 Therefore, the authors have investigated the factors affecting the carrier lifetimes in both p-type and n-type 4H-SiC epilayers, for example, the dependence of carrier lifetime on temperature and injection level. 16 As for the deep centers, the Z 1/2 center has been identified as the lifetime killer in n-type SiC, as mentioned above.…”

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confidence: 99%

Impacts of reduction of deep levels and surface passivation on carrier lifetimes in p-type 4H-SiC epilayers

Hayashi

Asano

Suda

et al. 2011

Journal of Applied Physics

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Temperature dependent recombination dynamics in InP/ZnS colloidal nanocrystals Appl. Phys. Lett. 101, 091910 (2012) Intrinsic defect in BiNbO4: A density functional theory study J. Appl. Phys. 112, 043706 (2012) The CuInSe2-CuIn3Se5 defect compound interface: Electronic structure and band alignment Appl. Phys. Lett. 101, 062108 (2012) Investigation of deep-level defects in conductive polymer on n-type 4H-and 6H-silicon carbide substrates using I-V and deep level transient spectroscopy techniques Impacts of reduction of deep levels and surface passivation on carrier lifetimes in p-type 4H-SiC epilayers are investigated. The authors reported that the carrier lifetime in n-type epilayers increased by reduction of deep levels through thermal oxidation and thermal annealing. However, the carrier lifetimes in p-type epilayers were not significantly enhanced. In this study, in order to investigate the influence of surface passivation on the carrier lifetimes, the epilayer surface was passivated by different oxidation techniques. While the improvement of the carrier lifetime in n-type epilayers was small, the carrier lifetime in p-type epilayers were remarkably improved by appropriate surface passivation. For instance, the carrier lifetime was improved from 1.4 ls to 2.6 ls by passivation with deposited SiO 2 annealed in NO. From these results, it was revealed that surface recombination is a limiting factor of carrier lifetimes in p-type 4H-SiC epilayers.

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“…SiC presents better properties than silicon, such as: a wide bandgap (2x), a higher saturation electron drift velocity (2x), a high thermal conductivity (5x) and a very high breakdown field (10x) [1]- [3]. Among the different silicon carbide power devices that have been developed [4]- [11], the SiC power diode structure is one of most interesting. It can appear as a discrete component or as an internal diode in more complex power conversion circuits.…”

Section: Introductionmentioning

confidence: 99%

Physical Modeling of SiC Power Diodes with Empirical Approximation

Hernandez

Claudio

Rodríguez

et al. 2011

Journal of Power Electronics

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This article presents the development of a model for SiC power diodes based on the physics of the semiconductor. The model is able to simulate the behavior of the dynamics of the charges in the N-region based on the stored charge inside the SiC power diode, depending on the working regime of the device (turn-on, on-state, and turn-off). The optimal individual calculation of the ambipolar diffusion length for every phase of commutation allows for solving the ambipolar diffusion equation (ADE) using a very simple approach. By means of this methodology development a set of differential equations that models the main physical phenomena associated with the semiconductor power device are obtained. The model is developed in Pspice with acceptable simulation times and without convergence problems during its implementation.

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High temperature SiC trench gate p-IGBTs

Cited by 36 publications

References 19 publications

4H‐SiC MISFETs with nitrogen‐containing insulators

4H‐SiC MISFETs with nitrogen‐containing insulators

Impacts of reduction of deep levels and surface passivation on carrier lifetimes in p-type 4H-SiC epilayers

Physical Modeling of SiC Power Diodes with Empirical Approximation

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