2006
DOI: 10.1016/j.sse.2006.02.008
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High temperature performance of AlGaN/GaN HEMTs on Si substrates

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Cited by 104 publications
(51 citation statements)
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“…For example, HEMTs on Si(111) with L G = 41 µm and L DG = L GS =3.5 µm, have a I DSS,max α T -2.3 , whereas for L G = 2 µm I DSS,max α T -1.37 . Following this tendency, submicron gates should have even lower temperature dependence (T -β , with β between 0.5-0.7), as reported by Tan et al in [7].…”
Section: Contributed Articlesupporting
confidence: 53%
“…For example, HEMTs on Si(111) with L G = 41 µm and L DG = L GS =3.5 µm, have a I DSS,max α T -2.3 , whereas for L G = 2 µm I DSS,max α T -1.37 . Following this tendency, submicron gates should have even lower temperature dependence (T -β , with β between 0.5-0.7), as reported by Tan et al in [7].…”
Section: Contributed Articlesupporting
confidence: 53%
“…Figure 2 further shows a complete reduction trend of G m,max in the E-and D-mode HEMTs against the rising temperature from 25 to 400 C. Degradation of G m is due to reduction of channel electron mobility with increased phonon scattering at higher temperature. 11) The circuit layout is the same as that presented by Wong et al 1) A photograph of the fabricated comparator is shown in Fig. 3, along with the schematic circuit diagram.…”
Section: Monolithic Integration Of Enhancement and Depletion-mode Hemmentioning
confidence: 99%
“…and increased I g . Moreover, they show a similar temperature degradation rate in I max and g m,max, which is believed to be mainly caused by the reduced electron mobility in the channel layer [7]. On the other hand, the bi-layer transistors exhibit a smaller temperature degradation rate in I g , relative to that of the HfO 2 devices.…”
Section: Methodsmentioning
confidence: 85%