High speed low area decimation filter for hearing aid application

Niveditha, V. R.; Palaniappan, Senthilnathan; Naresh, K.; Nayak, Chinmay Kumar; Swapna, B.

doi:10.1007/s10772-021-09857-5

Cited by 5 publications

(2 citation statements)

References 7 publications

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“…The corrector filters with half bands have been described for the HA system by Niveditha et al [16] to enhance signal transmission speed. The working of the designed filter is verified with the hardware HA application.…”

Section: Related Workmentioning

confidence: 99%

VHDL based Design of an Efficient Hearing Aid Filter using an Intelligent Variable-Bandwidth-Filter

Rawandale¹,

Ganorkar²,

Kolte³

2023

IJACSA

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Filtering techniques have been elaborated in the HA field to improve signal clarity and enhance the hearing capacity of deaf people. However, public sounds are highly noisy, so filtering those signals is not an easy task. Hence, the present article has aimed to develop a novel Ant Lion based power Noise-Variable Bandwidth Filter (ALPN-VBF) for the HA applications. Here, the proposed optimized power efficient filter has incorporated several functions like de-noising and frequency tuning based on the word features. Here, the signal's noise has been removed with the maximum possible range with the help of High-pass-Filter (HPF) and low-pass filter (LPF). Finally, the developed model is tested with a few audiograms, and the filter parameters have been analyzed and compared with other models. The testing results have proved that the designed filter is better in frequency tuning and signal transmission than the previous approaches by attaining less delay and reduced power consumption rate.

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Section: Related Workmentioning

confidence: 99%

VHDL based Design of an Efficient Hearing Aid Filter using an Intelligent Variable-Bandwidth-Filter

Rawandale¹,

Ganorkar²,

Kolte³

2023

IJACSA

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“…Shrivastava et al, 29 have presented the Efficient Architecture architectures needs look-up tables. RAM-or ROM-base look-up tables was returned by adders-and logic gates-base structure creates look-up tables value associated with input ASIC synthesis outcomes express the merits of presented model through lessening the area, power, ADP,EDP as 54%, 48.19%, 55%, 49%.…”

Section: Literature Surveymentioning

confidence: 99%

Adaptive FIR Filter Design with Approximate Adder and Hybridized Multiplier for Efficient Noise Eradication in Sensor Nodes

Immareddy,

Sundaramoorthy,

Alagarsamy

2023

ECS J. Solid State Sci. Technol.

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Finite Impulse Response (FIR) filter contributes a major role in most of the signal processing applications. However, the Finite Impulse Response filter performance is restricted by its speed, power and area usage. To address these issues, an adaptive FIR filter design using approximate adder and Hybridizing (Radix-8 Booth and TRAM) Approximate Multiplier (DA-AFIR-leadx-hybam-AC) is proposed in this manuscript for eradicating the noise in the sensor nodes. Here, Low error together with area efficient approximate adder (leadx) is used for reducing path delay and area utilization. For approximate multiplier design, proposed Hybridizing (Radix-8 Booth and TRAM) Approximate Multiplier using 15–4 Approximate Compressors (hybam-AC) is used for decreasing power consumption and design complexity. The simulation of the proposed model is implemented in Verilog and the design is synthesized in FPGA utilizing Xilinx ISE 14.5. The proposed DA-AFIR-leadx-hybam-AC filter design attains 33.6%, 22.75%, 29.69% lower power and 43.58%, 11.3%, 33.07% lower delay than the existing approaches, like DA-AFIR-MLDA-RNS, DA-AFIR-Hyb-CSD-ABR, DA-AFIR-SOPOT-MPGBP. Finally, the proposed DA-AFIR-leadx-hybam-AC filter design is applied for noise removal application in sensor nodes. The proposed Filter is implemented in MATLAB/Simulink for reading input signal.

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Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor nodes noise

Raja,

Naveen,

Durai

et al. 2023

Analog Integr Circ Sig Process

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High speed low area decimation filter for hearing aid application

Cited by 5 publications

References 7 publications

VHDL based Design of an Efficient Hearing Aid Filter using an Intelligent Variable-Bandwidth-Filter

VHDL based Design of an Efficient Hearing Aid Filter using an Intelligent Variable-Bandwidth-Filter

Adaptive FIR Filter Design with Approximate Adder and Hybridized Multiplier for Efficient Noise Eradication in Sensor Nodes

Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor nodes noise

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