High-Speed Fuzzy Inference Processor Using Active Rules Identification

Abstract

Once the input values are given, the active rules in a fuzzy inference execution have been determined. Based on the observation, our approach is to identify the active rules before fuzzy inference execution. To achieve this goal, our architecture provides the following two mechanisms: (1) a mechanism to ignore the non-active rules before fuzzy inference execution; and (2) a mechanism to arrange the active rules for fuzzy inference execution. The proposed architecture has been implemented using a 0.35μm cell library. Implementation data show that, if the number of active rules is only 4, the inference speed can achieve 23.755 MFLIPS. To the best of our knowledge, our approach is the fastest hardware implementation.

FPGA Based Pipelined Parallel Architecture for Fuzzy Logic Controller

“…Some high-speed fuzzy inference processors are proposed in [3,5,8,10,13] and [14] using different approaches such as ASIC, FPGA, DSP and MIPS processor approach.…”

“…Table I compares proposed fuzzy inference processor with above mentioned fuzzy inference processor concludes that it achieves very high performance. It is worth mentioning that [3] and [13] executed their instructions sequentially. Therefore, the works in [3] and [13] are only suitable for applications that have few rules or whose required inference speeds are not high.…”

“…The application of fuzzy technologies to real-time control problems implies that hardware realizations be adapted to the fuzzy paradigm. Many microelectronics implementations of fuzzy controllers have been proposed recently [2][3][4][5][6][7]. However, if fuzzy controllers are to be massively adopted in consumer products, they must fulfill some additional characteristics.…”

“…Many variations [1][2][3][4][5][6][7][8][9][10][11][12][13][14] have been proposed to improve the inferencing performance. The speed bottleneck of these fuzzy inference processors lies in the calculation of the matching degree.…”