High-Speed FIR Filter Design using Decision Tree Algorithm with FPGA Debugging
Murali Anumothu*,
Dr. Kakarla Harikishore
Abstract:In recent years, the filter is one of the key elements in signal processing applications to remove unwanted information. However, traditional FIR filters have been consumed more resources due to complex multiplier design. Mostly the complexity of the FIR filter is dominated by multiplier design. The conventional multipliers can be realized by Single Constant Multiplication (SCM) and Multiple Constant Multiplication (MCM) algorithms using shift and add/subtract operations. In this paper, a hybrid state decision… Show more
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