High-speed demonstration of an output interface driver for single-flux quantum systems

Harada, Naoki; Yoshida, Akira; Yokoyama, Naoki

doi:10.1109/tasc.2002.801814

Cited by 8 publications

(3 citation statements)

References 9 publications

(9 reference statements)

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“…In case of automatic error analysis the output data were directly fed back into the error performance analyzer and not displayed at the oscilloscope. Figure 18 shows the experimental setup, which is very similar to that used in [14] except we do not need an extra room temperature amplifier in front of the commercial BER-test equipment.…”

Section: Experimental Evaluation Of An Example Circuitmentioning

confidence: 99%

“…It even can be directly triggered by a single flux quantum pulse [13] and has very high switching speed of about 25 ps. For an SS with eight Josephson junctions, a data rate of 10 Gb s −1 was demonstrated with a bit-error-rate (BER) of 1.4×10 −9 [14]. A smaller version with only four Josephson junctions in the stack was operated at the same data rate at a much lower BER of 5 × 10 −12 [15].…”

Section: Introductionmentioning

confidence: 99%

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Design guidelines for Suzuki stacks as reliable high-speed Josephson voltage drivers

Ortlepp

Zheng

Whiteley

et al. 2013

Supercond. Sci. Technol.

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The application of superconducting circuits for high-performance computing and high-speed analog-to-digital converters suffers from the difficulty of amplifying the weak signals of superconducting circuits to the volt level of semiconductor electronics. We refer to the most accepted Josephson circuit used to amplify weak signals of about a millivolt to several tens of millivolts as a Suzuki stack. It can be directly triggered by a single flux quantum pulse and has a very high switching speed of about 25 ps.We report here an in-depth study of design issues for Suzuki stacks with extensive systematic simulations as well as experimental results. We explain the origin of previously reported phenomena such as multiple-level switching, high bit-error-rates, and interactions between stacks, and give design guidance for avoidance of such problems. We show experimental results for a set of Suzuki stacks operating correctly and independently with a single power supply.The presented design guidelines address important characteristics that need to be optimized: output voltage, bias margins, operating frequency, bit-error-rate, delay, power dissipation, and physical size.

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Section: Experimental Evaluation Of An Example Circuitmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Design guidelines for Suzuki stacks as reliable high-speed Josephson voltage drivers

Ortlepp

Zheng

Whiteley

et al. 2013

Supercond. Sci. Technol.

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“…For nanobit circuit technology, Mukhanov et al developed a superconducting quantum interference device (SQUID)-array IFC with control lines operating at 8 Gb/s, and obtained a 4-mV output voltage [4]. Harada up to 10 Gb/s [7]. For HTS circuit technology, operation of several types of IFCs has been demonstrated at low speed [9]- [11].…”

Section: Introductionmentioning

confidence: 99%

High-Speed Operation of HTS SQUID-Array Interface Circuits With a Cryocooler

Horibe

Tarutani

Tanabe

2004

IEEE Trans. Appl. Supercond.

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The authors evaluated the operation of high-temperature superconducting quantum interference device (SQUID)-array interface circuits (IFCs) with normal-metal control lines. Transimpedance amplification was obtained at an operating speed of 1 Gb/s using a cryocooler. The effect of the number of SQUIDs connected in series and the number of arrays connected in parallel on the level of output from the SQUID-array IFCs was examined by Josephson circuit simulation, and then the effect of statistical spreads of junction characteristics was evaluated by Monte Carlo simulation. It was found that the configuration of two parallel SQUID arrays with 64 SQUIDs gives the highest output when the junction characteristics in the arrays have a certain spread. The authors fabricated the IFCs by using the conventional interface-engineered junction process. The process reproducibility was 100 A 25% for junction , and 3.02 pH 5% and 2.57 pH 17% for the sheet inductance of the upper and lower electrodes, respectively. The transimpedance at low frequencies reached 20 and 4 V/A for input levels of 20 and 100 A, respectively. Output voltages as high as 4.4 mV at 4.2 K and 2.3 mV at 40 K were obtained. Furthermore, an output voltage of 600 V was obtained for a 1-Gb/s 2 15 1 pseudo-random binary signal input at 40 K.Index Terms-Cryocooler, high-speed operation, interface-engineered junctions, Monte Carlo simulation, superconducting quantum interference device (SQUID)-array interface circuits.

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