Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)
DOI: 10.1109/eptc.2004.1396570
|View full text |Cite
|
Sign up to set email alerts
|

High power planar interconnect for high frequency converters

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
10
0

Publication Types

Select...
6

Relationship

0
6

Authors

Journals

citations
Cited by 13 publications
(10 citation statements)
references
References 2 publications
0
10
0
Order By: Relevance
“…The top side of the devices (anode, emitter, or source) is directly wire-bonded to the top of the blade connector. Alternatively, a wirebond-less device interconnect, such as GE Power OverLay (POL) [8], has been used for connecting the device top side to the connector.…”
Section: Q1mentioning
confidence: 99%
See 1 more Smart Citation
“…The top side of the devices (anode, emitter, or source) is directly wire-bonded to the top of the blade connector. Alternatively, a wirebond-less device interconnect, such as GE Power OverLay (POL) [8], has been used for connecting the device top side to the connector.…”
Section: Q1mentioning
confidence: 99%
“…The POL fabrication process is described in [8]. The module includes an integral heat sink that provides a significantly better thermal performance over cold plates used in conventional modules [11].…”
Section: Detailed Designmentioning
confidence: 99%
“…10 shows the power module assembly prior to soldering the substrate to the baseplate and power devices to the substrate. The devices are shown without (upper) and with (lower) power overlay topside interconnect [9]. Both soldering steps, the substrate to the baseplate and power overlay to the substrate, were performed simultaneously using a 63%Sn/37%Pb solder.…”
Section: B Heat Sink Baseplate Fabricationmentioning
confidence: 99%
“…This technique interconnects power devices with direct metallurgical contacts to the chip pads [115]. Cross-sectional views of the module at various stages of the fabrication process are shown below.…”
Section: Figure 18mentioning
confidence: 99%
“…Also, resistive and inductive interconnect parasitics are reduced by this structure. Lastly, the planar structure eliminates unnecessary structures in the cooling path, which greatly improves the thermal performance of the modules [115]. However, it is susceptible to the same failure mechanisms related to direct copper attach, die attach fatigue, and substrate cracking, and it has the same limitations in use temperature due to the choice of polymer dielectrics.…”
Section: Figure 18mentioning
confidence: 99%