High performance Silicon-On-ONO (SOONO) Cell Array Transistors (SCATs) for 512Mb DRAM Cell Array Application

Abstract

Recently, we successfully demonstrated high performance nanorad transistors [6]. They have the As DRAM cell pitch size scales, the DRAM cells have structures of tri-gate implemented on SOI substrate using required characteristics of high performance transistors. In bulk Si. Therefore, they are very attractive devices in terms this paper, we proposed and successfully demonstrated high of low junction leakage current, inherent high speed performance Silicon-On-ONO (SOONO) cell array operation due to the reduced junction capacitance, low transistors (SCATs) for 512Mb DRAM cell array application. power, and 3-D tri-gate that has strong SCE immunity and They have advantages of SOI substrate and 3-D tri-gate as high current drivability as well as process simplicity. The well as process simplicity. From those advantages, they have transistors based on this structure are loaded into the DRAM low IOFF due to good SCE immunity with DIBL of 40 mV/V cells, named Silicon-On-ONO (SOONO) cell array

Crystallographic Silicon-Etching for Ultra-High Aspect-Ratio FinFET

“…This makes them particularly attractive for lowpower and high-gain applications. Various FinFET-based circuits have been demonstrated and characterized, such as digital logic, SRAM, DRAM and Flash memory (1,2,3,4). Moreover, FinFETs are also considered for analog applications and have shown potential in the frequency range below 10 GHz, with further improvement possible by the reduction of parasitics (4).…”