High performance rotation architectures based on the radix-4 CORDIC algorithm

Antelo, E.; Villalba, J.; Bruguera, J.D.; Zapata, Emilio L.

doi:10.1109/12.609275

Cited by 108 publications

(73 citation statements)

References 21 publications

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“…For radix-2, the scale factor needs to be computed for n/2 iterations as k i = √ 1 + 2 −2i becomes unity for i > n/2+1. In redundant radix-4 CORDIC [43], scale factor (15) is not constant. In addition, it is sufficient to compute K for n/4 iterations as k i = √ 1 + 4 −2i becomes unity thereafter.…”

Section: Scale Factor Computationmentioning

confidence: 99%

“…To overcome these drawbacks, pipelined implementations are proposed [40,41]. However, [43]. The redundant radix-2 CORDIC [42] is proposed by employing redundant arithmetic.…”

Section: Vectoring Modementioning

confidence: 99%

“…The range of K is (1, 2.52) for radix-4 CORDIC. In this CORDIC, the direction of rotation is computed based on the estimated value of w i [43]. The w path involves the computation of estimated w i and evaluation of selection function to determine σ i resulting in increase of the iteration delay compared to that of radix-2.…”

Section: Redundant Radix-4 Cordic Algorithmmentioning

confidence: 99%

“…The various radix-2 CORDIC algorithms presented so far may be used to reduce the iteration delay, thereby improving the throughput, with constant scale factor. Higher radix CORDIC algorithms using SD arithmetic [54,58] and CS arithmetic [43,59] are proposed to address latency reduction. This is possible, since higher radix representation reduces the number of iterations.…”

Section: Higher Radix Redundant Cordicmentioning

confidence: 99%

“…This algorithm achieves constant scale factor, since the rotation corresponding to σ = 0 is avoided for i ≤ n/2 + 1. Fori > n/2 + 1 scale factor need not be computed as [43]. A redundant radix-4 CORDIC algorithm is proposed using CS arithmetic, to reduce the latency compared to redundant radix-2 CORDIC [42].…”

Section: Redundant Radix 2-4 Cordicmentioning

confidence: 99%

See 4 more Smart Citations

CORDIC Architectures: A Survey

Boppana

Dhar

2010

VLSI Design

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In the last decade, CORDIC algorithm has drawn wide attention from academia and industry for various applications such as DSP, biomedical signal processing, software defined radio, neural networks, and MIMO systems to mention just a few. It is an iterative algorithm, requiring simple shift and addition operations, for hardware realization of basic elementary functions. Since CORDIC is used as a building block in various single chip solutions, the critical aspects to be considered are high speed, low power, and low area, for achieving reasonable overall performance. In this paper, we first classify the CORDIC algorithm based on the number system and discuss its importance in the implementation of CORDIC algorithm. Then, we present systematic and comprehensive taxonomy of rotational CORDIC algorithms, which are subsequently discussed in depth. Special attention has been devoted to the higher radix and flat techniques proposed in the literature for reducing the latency. Finally, detailed comparison of various algorithms is presented, which can provide a first-order information to designers looking for either further improvement of performance or selection of rotational CORDIC for a specific application.

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Section: Scale Factor Computationmentioning

confidence: 99%

“…To overcome these drawbacks, pipelined implementations are proposed [40,41]. However, [43]. The redundant radix-2 CORDIC [42] is proposed by employing redundant arithmetic.…”

Section: Vectoring Modementioning

confidence: 99%

Section: Redundant Radix-4 Cordic Algorithmmentioning

confidence: 99%