High performance RF power LDMOSFETs for cellular handsets formed in thick-strained-Si/relaxed-SiGe structure

Kondô, Masao; Sugii, Nobuyuki; Hoshino, Yo; Hirasawa, W.; Kimura, Y.; Miyamoto, Masahiko; Fujioka, T.; Kamohara, S.; Kondo, Y.; Kimura, S.; Yoshida, Isao

doi:10.1109/iedm.2005.1609352

Cited by 7 publications

(1 citation statement)

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“…Several researchers have proposed solutions to these trade-offs such as using a double-doped offset, 2) or a stacked or step drift region, [3][4][5] or even the strain structure. 6) As well as by changing the device process flow, the tradeoff between the on-resistance and the breakdown voltage can also be solved by optimizing the layout design. In highpower applications, the RF transistors are usually implemented in a ''fishbone'' structure, as shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

Characterization of RF Lateral-Diffused Metal–Oxide–Semiconductor Field-Effect Transistors with Different Layout Structures

Hu¹,

Chen

Huang

et al. 2007

jjap

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The DC and RF characteristics of lateral-diffused metal-oxide-semiconductor (LDMOS) transistors with different layout structures were studied. The devices were fabricated using a 0.5 mm LDMOS process. The ring and fishbone structures, which are used widely in power devices, were designed and analyzed. We found that the transconductance, on-resistance, cutoff frequency and maximum oscillation frequency were improved using the ring structure, due to a larger equivalent W=L and lower drain parasitic resistance. In addition, the self-heating effect of LDMOS transistors was also investigated by measuring the pulsed current-voltage (I-V) and pulsed RF characteristics. From the measured results, the ring structure appeared to be a better layout design for RF LDMOS transistors.

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Section: Introductionmentioning

confidence: 99%

Characterization of RF Lateral-Diffused Metal–Oxide–Semiconductor Field-Effect Transistors with Different Layout Structures

Hu¹,

Chen

Huang

et al. 2007

jjap

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Effect of mechanical stress on LDMOSFETs: Dependence on orientation and gate bias

Aghoram

Liu

Chu

et al. 2009

2009 21st International Symposium on Power Semiconductor Devices &Amp; IC's

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Thick-Strained-Si/SiGe CMOS Technology with Selective-Epitaxial-Si Shallow-Trench Isolation (SES-STI)

Miyamoto

Sugii

Yoshida

et al. 2006

2006 International SiGe Technology and Device Meeting

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We developed a new bulk strained-Si/SiGe CMOS technology free from any Ge-related problems, which has a 90-110-nm strained-Si layer thicker than the limit at which misfit-dislocations occur, and a new shallow-trench isolation structure that has a selective-epitaxial Si layer to cover up the SiGe trench surface. This process has advantages in manufacturing compatibility with Si-CMOS process, low junction leakage current, and no reliability problems caused by Ge out-diffusion, with the same performance enhancement as thin (< 20 un) strained-Si/SiGe.

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High performance RF power LDMOSFETs for cellular handsets formed in thick-strained-Si/relaxed-SiGe structure

Cited by 7 publications

References 1 publication

Characterization of RF Lateral-Diffused Metal–Oxide–Semiconductor Field-Effect Transistors with Different Layout Structures

Characterization of RF Lateral-Diffused Metal–Oxide–Semiconductor Field-Effect Transistors with Different Layout Structures

Effect of mechanical stress on LDMOSFETs: Dependence on orientation and gate bias

Thick-Strained-Si/SiGe CMOS Technology with Selective-Epitaxial-Si Shallow-Trench Isolation (SES-STI)

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