High-performance parallel accelerator for flexible and efficient run-time monitoring

Abstract

This paper proposes Harmoni, a high performance hardware accelerator architecture that can support a broad range of run-time monitoring and bookkeeping functions. Unlike custom hardware, which offers very little configurability after it has been fabricated, Harmoni is highly configurable and can allow a wide range of different hardware monitoring and bookkeeping functions to be dynamically added to a processing core even after the chip has already been fabricated. The Harmoni architecture achieves much higher efficiency than software implementations and previously proposed monitoring platforms by closely matching the common characteristics of run-time monitoring functions that are based on the notion of tagging. We implemented an RTL prototype of Harmoni and evaluated it with several example monitoring functions for security and programmability. The prototype demonstrates that the architecture can support a wide range of monitoring functions with different characteristics. Harmoni takes moderate silicon area, has very high throughput, and incurs low overheads on monitored programs.

A verified information-flow architecture

“…While early systems supported a single hard-coded taint propagation policy, recent ones allow the policy to be defined in software [26,31,92] and support monitoring policies that go beyond taint tracking [19,31,32,76]. Harmoni [31], for example, provides a pair of caches that are quite similar to the SAFE rule cache. Possibly these could even be adapted to enforcing noninterference, in which case we expect the proof methodology introduced here to apply.…”

“…Hardware taint tracking The last decade has seen significant progress in specialized hardware for accelerating taint tracking [18,25,26,31,32,89,92]. Most commonly, a single tag bit is associated with each word to specify if it is tainted or not.…”

“…Similarly, operating systems with information-flow tracking have been a staple of the OS literature for over a decade [36,54,55,66,97,97]. But progress at the hardware level has been more limited, with most proposals concentrating on hardware acceleration for taint-tracking schemes [18,25,26,31,32,89,92]. SAFE extends the state of the art in two significant ways.…”

Architectural Support for Software-Defined Metadata Processing

“…Aries sketches a vision for cached metadata propagation rules [11], and more recently Harmoni shows where a rule cache would fit in a programmable tag processing architecture [24], though neither shows how to map policies into rule tables or evaluates the runtime characteristics of rulecache-supported policies. FlexiTaint [66] is closest to our design; it demonstrates support for two taint propagation policies and their combination.…”

Micro-Policies: Formally Verified, Tag-Based Security Monitors

“…Hardware acceleration is thus an attractive alternative, especially in an era of cheap transistors. Many designs for hardware monitors have been proposed, with early designs focusing on enforcing single, hard-wired security policies [21], [22], [29], [71], [73], [79] and later ones evolving toward more programmable mechanisms [23], [31], [37], [38], [45], [70], [83] that allow quicker adaptation to a shifting attack landscape. Recent work has gone yet further in this direction by defining a generic, fully programmable hardware/software architecture for tag-based monitoring on a conventional processor extended with a Programmable Unit for Metadata Processing (PUMP) [39].…”