High Performance Modified Static Segment Approximate Multiplier based on Significance Probability

Jothin, R.; Vasanthanayaki, C.

doi:10.1007/s10836-018-5748-3

Cited by 6 publications

(2 citation statements)

References 12 publications

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“…In this regard, the innovative AM approaches are developed by different researchers along with the performance analysis. Initially, area-efficient AMs are designed using static, dynamic, and modified static approaches [10][11]. These AMs provide better area but with more errors in the output of AMs.…”

Section: Introductionmentioning

confidence: 99%

High-Speed and Low-Power Recursive Rounding Based Approximate Multipliers for Error-Resilience Applications

Rao,

2023

Preprint

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Approximate multipliers play a requisite role in error-resilience applications having a trade-off between error and design metrics. Consequently, in this paper, recursive rounding-based approximate multipliers are proposed to enhance both error and design metrics. First, in the n/2-bit, the most significant and least significant bits are chosen for every n-bit input operand. Next, these n/2-bits are rounded to the closest power of two in the proposed multipliers architecture. Succeedingly, the final multiplication product is achieved using rounding, shifters, and adders. On top of that, all the proposed and existing multipliers are developed using Verilog Code with inputs widths ranging from 8-bit to 32-bit, synthesized using Cadence RTL compiler, and simulated using Vivado and MATLAB for Image Smoothing Filter. Further, the error and design metrics of the newly developed and existing multipliers are analyzed. It is observed through the simulation results that reductions in delay and power consumption are achieved through the proposed multipliers on an average of 21.35% and 40%, respectively, compared to that of state-of-the-art multipliers. Furthermore, the proposed multipliers also provide high PSNR and SSIM over the existing multipliers after incorporating the proposed multipliers in the image smoothing filter, which is suitable for Error-Resilience applications.

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Section: Introductionmentioning

confidence: 99%

High-Speed and Low-Power Recursive Rounding Based Approximate Multipliers for Error-Resilience Applications

Rao,

2023

Preprint

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“…To the best of our knowledge, no signed static segmented multipliers have been investigated so far, while the only paper to date that tries to improve the accuracy of static segmented multipliers is [48] that, however, requires the introduction of two carry-propagate adders before the m × m inner multiplier, with significant increase of delay and power…”

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confidence: 99%

Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements

Strollo

Napoli

et al. 2022

IEEE Trans. Circuits Syst. I

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Approximate multipliers are used in error-tolerant applications, sacrificing the accuracy of results to minimize power or delay. In this paper we investigate approximate multipliers using static segmentation. In these circuits a set of m contiguous bits (a segment of m bits) is extracted from each of the two n-bits operand, the two segments are in input to a small m × m internal multiplier whose output is suitably shifted to obtain the result. We investigate both signed and unsigned multipliers, and for the latter we propose a new segmentation approach. We also present simple and effective correction techniques that can significantly reduce the approximation error with reduced hardware costs. We perform a detailed comparison with previously proposed approximate multipliers, considering a hardware implementation in 28 nm technology. The comparison shows that static segmented multipliers with the proposed correction technique have the desirable characteristic of being on (or close to) the Pareto-optimal frontier for both power vs normalized mean error distance and power vs mean relative error distance trade-off plots. These multipliers, therefore, are promising candidates for applications where their error performance is acceptable. This is confirmed by the results obtained for image processing and image classification applications.

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Investigation of Error-Tolerant Approximate Multipliers for Image Processing Applications

Raju¹,

Rao

2022

Communication and Intelligent Systems

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High Performance Modified Static Segment Approximate Multiplier based on Significance Probability

Cited by 6 publications

References 12 publications

High-Speed and Low-Power Recursive Rounding Based Approximate Multipliers for Error-Resilience Applications

High-Speed and Low-Power Recursive Rounding Based Approximate Multipliers for Error-Resilience Applications

Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements

Investigation of Error-Tolerant Approximate Multipliers for Image Processing Applications

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