High performance low leakage power full adder circuit design using rate sensing keeper

Ajayan, J.; Nirmal, D.; Sivaranjani, D.; Sivasankari, S.; Manikandan, M.

doi:10.1109/ecs.2014.6892569

2014 International Conference on Electronics and Communication Systems (ICECS) 2014

DOI: 10.1109/ecs.2014.6892569

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High performance low leakage power full adder circuit design using rate sensing keeper

J. Ajayan

D. Nirmal

D. Sivaranjani

et al.

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High performance low leakage power full adder circuit design using rate sensing keeper

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References 24 publications

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