High-Performance IIR Filter Implementation Using FPGA

Digital filtration is widely used today in many application fields, and with the increased use of low-cost embedded processors, it can be applied to vast areas. A drawback of digital filtration algorithms is the introduction of phase angle shifts in the filtered signals, thereby creating undesirable characteristics in many application fields. In this work, low-pass filters of finite impulse response and infinite impulse response types are designed with an innovative buffering scheme to delay a digitally low-passed signal by an angle ranging from 0° to 180° for real-time signals. The application of the filtration and buffering scheme on a cost-effective embedded processor with limited signal processing capabilities opens the horizons for its applicability in many signal processing fields. In assessing its practicality, the generated filtered output signal is correlated with the original signal (a low-passed version), revealing correlation values reaching 0.99 in certain instances. The novelty of the proposed approach enables its application to a broad-spectrum area of digital signal filtration.

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High-Performance IIR Filter Implementation Using FPGA

Cited by 4 publications

References 6 publications

An Efficient FPGA-Based Accelerator for Perceptual Weighting Filter in Speech Coding

An Efficient FPGA-Based Accelerator for Perceptual Weighting Filter in Speech Coding

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An Innovative Embedded Processor-Based Signal Phase Shifter Algorithm

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