High performance encryption cores for 3G networks

Balderas-Contreras, Tomás; Cumpliclo, R.

doi:10.1145/1065579.1065642

Cited by 6 publications

(2 citation statements)

References 3 publications

(1 reference statement)

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“…Figure 1 shows the elements that make up the algorithm, how the input plaintext block is split into sections, the operations performed on every Figure 1 are neither UML diagrams nor block diagrams of a hardware architecture that implements the algorithm. It is possible to manipulate the structure of KASUMI to build implementations that consume fewer resources or achieve higher performance [13,14]. An activity diagram in UML 2 may be used to represent the flow of data and the operations required by the components of KASUMI.…”

Section: High-level Modeling Of Block Ciphers Using Umlmentioning

confidence: 99%

“…The previous example illustrated the synthesis of VHDL code from a description of KASUMI intended to optimize the performance of the resulting digital hardware system. Alternatively, the designer may manipulate the structure of the model of KASUMI to simplify the algorithm and produce area‐efficient systems like those described by the authors previously . Thus, the designer is responsible for building models according to a strategy for reaching a specific design goal.…”

Section: Transformation Of Models Into Vhdl Codementioning

confidence: 99%

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Synthesizing VHDL from Activity Models in UML 2

Balderas-Contreras

Cumplido²,

Rodríguez³

2012

Circuit Theory & Apps

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This document describes a synthesis technology that generates structural VHDL code from models describing the flow of data required to perform algorithms operating on bit‐blocks. The models are built using restricted activity diagrams in the Unified Modeling Language version 2. The code generator is developed using Acceleo, a technology to implement transformations from models to text. The technology described in this paper exploits the principles of object orientation and model‐driven engineering. The primary aim is to improve productivity and alleviate complexity during the design of digital hardware systems that implement demanding operations used by a wide variety of computing devices. The use of the technology is illustrated with the generation of VHDL code from models describing a block cipher algorithm. Copyright © 2012 John Wiley & Sons, Ltd.

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Section: High-level Modeling Of Block Ciphers Using Umlmentioning

confidence: 99%

Section: Transformation Of Models Into Vhdl Codementioning

confidence: 99%

Synthesizing VHDL from Activity Models in UML 2

Balderas-Contreras

Cumplido²,

Rodríguez³

2012

Circuit Theory & Apps

Self Cite

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A Very Compact Hardware Implementation of the KASUMI Block Cipher

Yamamoto

Itoh

Yajima

2010

Information Security Theory and Practices. Security and Privacy of Pervasive Systems and Smart Devices

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Abstract. For mobile devices, this paper proposes a compact hardware (H/W) implementation for the KASUMI block cipher, which is the 3GPP standard encryption algorithm. In [4], Yamamoto et al. proposed the method of reducing temporary registers for the MISTY1 FO function (YYI-08), and implemented a very compact MISTY1 H/W. This paper aims to design the smallest KASUMI H/W by the application of YYI-08 to KASUMI, which has a similarly structured MISTY1 FO function. We discussed the applicability and found the problems on register competition and logical equivalence in the simple application, so we propose the new YYI-08 improved for KASUMI and the compact H/W architecture. According to our logic synthesis on a 0.11-µm ASIC process, the gate size is 2.99 Kgates, which is the smallest as far as we know.

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Compact and High Speed Architectures of KASUMI Block Cipher

Yasir

Ali

et al. 2018

Wireless Pers Commun

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High performance encryption cores for 3G networks

Cited by 6 publications

References 3 publications

Synthesizing VHDL from Activity Models in UML 2

Synthesizing VHDL from Activity Models in UML 2

A Very Compact Hardware Implementation of the KASUMI Block Cipher

Compact and High Speed Architectures of KASUMI Block Cipher

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