High-Performance E-Mode AlGaN/GaN HEMTs with LT-GaN Cap Layer Using Gate Recess Techniques

Abstract

Enhancement-mode (E-mode) AlGaN/GaN HEMTs are attracting interest because their use of a single-polarity voltage supply simplifies power amplifier circuits. Several approaches have been applied to develop E-mode AlGaN/GaN HEMTs [1] [2], but thus far, the performance of these devices has been limited. In this report, we describe a gate recess technique, based on SiCl 4 plasma etching, to achive leakage reduction. The proposed gate recess process plays an important role in obtaining Emode operation in an AlGaN/GaN HEMT. On the other hand, we previously applied a highly resistive low-temperature GaN (LT-GaN) cap layer to serve as a gate insulator and provide surface passivation in AlGaN/GaN HEMTs, and we found that this approach can suppress gate leakage and current collapse [3]. By combining these approaches, using both the proposed gate recess process and an LT-GaN cap layer, we fabricated E-mode devices with high-performance characteristics, including a high transconductance, a high drain current, a high breakdown voltage (BV off ), and a low gate leakage current. Figure 1 shows a schematic cross section of a recessed gate LT-GaN/AlGaN/GaN HEMT. The ohmic contact electrodes were formed by rapid thermal annealing of Ti/Al/Ti/Au at 850 • C. For Schottky contact formation, the etching region was patterned with photoresist, and recess etching was carried out by ICP-RIE using SiCl 4 plasma to achieve a gate-to-channel distance of 10 nm. In the present work, the LT-GaN cap layer under the gate was removed during the recess etching process. Subsequently, a N 2 plasma treatment was applied to reduce the amount of nitrogen vacancy-related defects, and a buffered hydrofluoric acid (BHF) treatment was used to remove discharge-gas-related residues. After these posttreatments, Ni/Au metals were evaporated in a self-aligned process with respect to the etching region. For comparison, a conventional AlGaN/GaN HEMT without a LT-GaN cap layer was also fabricated, without using gate recess etching. The gate length of these devices was 0.6 µm, while the gate width was 50×2 µm. The source-to-gate distance was 1.0 µm, and the gate-to-drain distance was 3.0 µm. Figure 2 shows the transfer characteristics of the fabricated HEMTs. For the E-mode HEMT, the value of V th , determined as the gate bias intercept of the linear extrapolation of the drain current at the peak g m , was +0.51 V. The peak g m was 236 mS/mm, and I d reached 648 mA/mm at a V gs of 4 V without excessive gate leakage (I g = 0.82 mA/mm at V gs = 4 V). In addition, both the gate leakage current under a reverse bias and the gate current under a foward bias were significantly reduced in the E-mode HEMT as compared to the conventional HEMT, as illustrated in Figure 3. These results suggest that the dry etching process introduced deep accepters into the surface of the AlGaN barrier layer. As a result, the depletion layer thickness of the gate increased, and the gate leakage current due to electron tunneling became small. Figure 4 shows the DC and pulsed I d -V ds characteri...

Comparison of Two Types of Recessed-Gate Normally-Off AlGaN/GaN Heterostructure Field Effect Transistors

“…[12][13][14][15] Nevertheless, these conventional methods all need the plasma treatment process, which unavoidably introduce the damages to the active region of HFETs. These damages will increase the on-state resistance (R on ) and gate leakage current, [16][17][18][19][20][21] which deteriorate switching performance and limit forward gate voltage swing. In order to solve this problem, recently, selective area growth (SAG) technique had been demonstrated 22) to realize a novel recessed gate normally-off devices, in which no plasma treatment process was involved.…”

Enhancement-Mode Insulating-Gate AlInN/AlN/GaN Heterostructure Field-Effect Transistors with Threshold Voltage in Excess of +1.5 V

“…Therefore, many of the reported HEMTs showed pinch-off of the channel at gate voltages close to 0 V despite the high values for I DS . 10,11) A few other research groups have implemented gate-recessed AlGaN/GaN metal-insulator-semiconductor field-effect transistors (MIS-FETs) to achieve E-mode operation with low gate leakage. 12,13) The devices exhibited threshold voltages that were better than +2.5 V and breakdown voltages !400 V. On the other hand, the drain current density was limited to $200 mA/mm when up to 12 V bias was applied to the gate.…”

High-Temperature Characteristics in Recessed-Gate AlGaN/GaN Enhancement-Mode Heterostructure Field Effect Transistors with Enhanced-Barrier Structures

“…AlGaN/GaN enhancement-mode (E-mode) heterostructure field-effect transistors (HFETs) have attracted much attention in recent years for power electronics applications. After the first E-mode operation was reported for an AlGaN/ GaN HFET with a thin AlGaN, 1) various structures have been proposed for E-mode HFETs: e.g., AlGaN/GaN heterostructures with a thin AlGaN and surface passivation, [2][3][4] recessed-gate structures, [5][6][7][8] AlGaN/GaN heterostructures with fluoride plasma treatment, 9,10) a recessed-gate structure with fluorine-based surface treatment, 11) p-type GaN [12][13][14] and AlGaN gates, 15) InGaN gates, 16) doubleheterostructure channels with recessed-gate structures, 17,18) and selectively oxidized recessed-gate structures. 19) It is also noted that insulated-gate structures have successfully been introduced into various E-mode HFETs.…”