High performance DSP for vision, imaging and neural networks

Efland, Greg; Parikh, Sandip; Sanghavi, Himanshu; Farooqui, A.A.

doi:10.1109/hotchips.2016.7936210

Cited by 19 publications

(12 citation statements)

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“…This has led to the emergence of a plethora of hardware acceleration engines. The solutions range from mainstream devices adapted for neural network computations, such as GPUs, to custom processor hardware optimised for neural network acceleration [11,25,1,12,8,13]. Bringing the computation closer to the sensor offers distinct advantages in terms of data reduction and power efficiency.…”

Section: Introductionmentioning

confidence: 99%

A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays

Bose

Dudek

Chen

et al. 2019

2019 IEEE/CVF International Conference on Computer Vision (ICCV)

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We present a convolutional neural network implementation for pixel processor array (PPA) sensors. PPA hardware consists of a fine-grained array of general-purpose processing elements, each capable of light capture, data storage, program execution, and communication with neighboring elements. This allows images to be stored and manipulated directly at the point of light capture, rather than having to transfer images to external processing hardware. Our CNN approach divides this array up into 4x4 blocks of processing elements, essentially trading-off image resolution for increased local memory capacity per 4x4 "pixel". We implement parallel operations for image addition, subtraction and bit-shifting images in this 4x4 block format. Using these components we formulate how to perform ternary weight convolutions upon these images, compactly store results of such convolutions, perform max-pooling, and transfer the resulting sub-sampled data to an attached micro-controller. We train ternary weight filter CNNs for digit recognition and a simple tracking task, and demonstrate inference of these networks upon the SCAMP5 PPA system. This work represents a first step towards embedding neural network processing capability directly onto the focal plane of a sensor.

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Section: Introductionmentioning

confidence: 99%

A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays

Bose

Dudek

Chen

et al. 2019

2019 IEEE/CVF International Conference on Computer Vision (ICCV)

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“…These devices are extremely low power (often less than 1W) and are often used at the edges of IoT networks to perform tasks enabled by CNNs, such as object detection and recognition. The family of low power edge devices includes the Intel/Movidius Myriad [7], CEVA XM [8], and Cadence Tensilica vision DSP [9]. Fig.…”

Section: Edge Devices and Cnn Implementation Challengesmentioning

confidence: 99%

“…IoT devices that locally process data from visual sensors are enabled by low power embedded platforms such as multicore DSPs, embedded GPUs, and field programmable gate arrays (FPGAs). From the market perspective, the annual growth rate of the machine vision market is exceeding 13% [6] and many commercial solutions are available today that enable applications from domains such as drones, robotics, and autonomous driving [7]- [9].…”

Section: Introductionmentioning

confidence: 99%

A Design Space Exploration Framework for Convolutional Neural Networks Implemented on Edge Devices

Tsimpourlas

Papadopoulos

Bartsokas

et al. 2018

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Deploying convolutional neural networks (CNNs) in embedded devices that operate at the edges of Internet of Things (IoT) networks provides various advantages in terms of performance, energy efficiency, and security in comparison with the alternative approach of transmitting large volumes of data for processing to the cloud. However, the implementation of CNNs on low power embedded devices is challenging due to the limited computational resources they provide and to the large resource requirements of state-of-the-art CNNs. In this paper, we propose a framework for the efficient deployment of CNNs in low power processor-based architectures used as edge devices in IoT networks. The framework leverages design space exploration (DSE) techniques to identify efficient implementations in terms of execution time and energy consumption. The exploration parameter is the utilization of hardware resources of the edge devices. The proposed framework is evaluated using a set of 6 state-of-the-art CNNs deployed in the Intel/Movidius Myriad2 low power embedded platform. The results show that using the maximum available amount of resources is not always the optimal solution in terms of performance and energy efficiency. Fine-tuned resource management based on DSE, reduces the execution time up to 3.6% and the energy consumption up to 7.7% in comparison with straightforward implementations.

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“…This work focuses on the family of processor-based heterogeneous embedded platforms, which are extremely low power (often <1W) and are often used at the edges of IoT networks to perform tasks enabled by deep learning algorithms, such as object detection and recognition. It includes CEVA XM [14], Cadence Tensilica vision DSP [6] and Intel/Movidius Myriad [11]. A typical high-level schematic diagram is depicted in Fig.…”

Section: Edge Devices and Cnn Implementation Challengesmentioning

confidence: 99%

“…[2]) and heterogeneous SoCs with deep learning processing capabilities. CEVA XM [14], Cadence Tensilica vision DSP [6] and Intel/Movidius Myriad [11] belong to the family of programmable embedded processorbased platforms that rely on a set of vector processing units and on high memory bandwidth to provide computational power within a few Watts of power envelope. Nevertheless, significant effort is required to bring the computational load of state-of-the-art CNNs within the power envelope of such low power edge devices.…”

Section: Introductionmentioning

confidence: 99%

Efficient Winograd-based Convolution Kernel Implementation on Edge Devices

Xygkis

Soudris²,

Papadopoulos³

et al. 2018

2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

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The implementation of Convolutional Neural Networks on edge Internet of Things (IoT) devices is a significant programming challenge, due to the limited computational resources and the real-time requirements of modern applications. This work focuses on the efficient implementation of the Winograd convolution, based on a set of application-independent and Winograd-specific software techniques for improving the utilization of the edge devices computational resources. The proposed techniques were evaluated in Intel/Movidius Myriad2 platform, using 4 CNNs of various computational requirements. The results show significant performance improvements, up to 54%, over other convolution algorithms.

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High performance DSP for vision, imaging and neural networks

Cited by 19 publications

References 0 publications

A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays

A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays

A Design Space Exploration Framework for Convolutional Neural Networks Implemented on Edge Devices

Efficient Winograd-based Convolution Kernel Implementation on Edge Devices

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