High-performance Coprocessors for Arithmetic and Logic Operations of Multi-Bit Cores for Vector and Scalar Supercomputers

Nykolaychuk, Yaroslav; Hryha, Volodymyr; Vozna, Nataliіa; Voronych, Artur; Segin, Andriy; Humennyi, Petro

doi:10.1109/acit54803.2022.9913198

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction2

пріоритетні напрями удосконалення досліджуваного класу співп...1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2023

Publication Types

Select...

Article1

Other1

Relationship

Self Cite1

Independent1

Authors

Journals

Cited by 2 publications

(3 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…З метою удосконалення та підвищення швидкодії такого класу БДС нами запропонована структура на основі інверсних входо-виходів однорозрядних суматорів з парафазними (кубітними) інформаційними входами [4], яка представлена на рис. 1.…”

Section: пріоритетні напрями удосконалення досліджуваного класу співп...unclassified

High-performance synchronized matrix ALU multiplication processor for supercomputers

Nykolaychuk,

Hryha,

Zastavnyi

2023

PMMIT

Self Cite

View full text Add to dashboard Cite

Section: пріоритетні напрями удосконалення досліджуваного класу співп...unclassified

High-performance synchronized matrix ALU multiplication processor for supercomputers

Nykolaychuk,

Hryha,

Zastavnyi

2023

PMMIT

Self Cite

View full text Add to dashboard Cite

“…-linear (cascade) without structural branches [4,[7][8][9][10][11][12][13]; -accumulating adders with memory [4,5,12]; -pyramidal multi-bit adders [14][15][16]; -adders with accelerated transfers [4,6,14,16]; -vertically organized binary adders [3,4].…”

Section: Introductionmentioning

confidence: 99%

“…At the same time, the possibilities of improving structural solutions and improving of the system characteristics of single-bit and multi-bit adders according to various criteria of complexity and speed have not yet been fully exhausted [15,16].…”

Section: Introductionmentioning

confidence: 99%

Design and Synthesis of Multi-Bit Binary Adders on FPGA

Hryha,

Mandzyuk,

Kohut

et al. 2023

Theoretical and Applied Aspects of Device Development on Microcontrollers and FPGAs 2023

View full text Add to dashboard Cite

Fields of application and main classes of multibit binary adders (MBAs) are outlined. The well-known structures of cascade, parallel-serial and pyramidal multi-bit adders are analyzed and their system characteristics are determined when classical single-bit components are used. A comparison of the system characteristics of the MBA using the new single-bit components of full and partial adders is carried out. MBA structures were developed using hardware description languages, and their simulation and synthesis on FPGA was performed.

show abstract

High-performance Coprocessors for Arithmetic and Logic Operations of Multi-Bit Cores for Vector and Scalar Supercomputers

Cited by 2 publications

References 1 publication

High-performance synchronized matrix ALU multiplication processor for supercomputers

High-performance synchronized matrix ALU multiplication processor for supercomputers

Design and Synthesis of Multi-Bit Binary Adders on FPGA

Contact Info

Product

Resources

About