High performance compact energy efficient error tolerant adders and multipliers for 16-bit image processing applications

Jothin, R.; Mohamed, M. Peer; Vasanthanayaki, C.

doi:10.1016/j.micpro.2020.103237

Cited by 23 publications

(14 citation statements)

References 16 publications

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“…The 4:2 inexact compressor is the most prevalent one in the literature. The ones in previous studies 14,[16][17][18][19][20] remove the carry signals. One of the input partial products is also truncated in Sabetzadeh et al 14 As a result of this truncation, the compressor in Sabetzadeh et al 14 has a higher NED than the other equivalents.…”

Section: Proposed Multicolumn Inexact Compressormentioning

confidence: 99%

“…Image and signal processing have been among the fruitful areas for the employment of imprecise arithmetic circuits such as adders [9][10][11][12] and multipliers. [12][13][14][15][16][17][18][19][20][21] A multiplier is an arithmetic unit with a considerable impact on the performance of the entire system. It is widely utilized in digital signal processing, linear algebra, cryptosystems, and 3D graphic accelerators.…”

Section: Introductionmentioning

confidence: 99%

“…Several varieties of 4:2 inexact compressors have also been suggested. [14][15][16][17][18][19][20][21]29 There are some wider inexact compressors in the literature as well. 13,[30][31][32][33] Finally, truncation is another technique for constructing efficient approximate multipliers.…”

Section: Introductionmentioning

confidence: 99%

“…To the best of our knowledge, none of the previous approximate multipliers can accumulate partial products in such a few stages. [13][14][15][16][17][18][19][20][21][32][33][34][35][36][37] Afterward, the proposed multipliers are utilized in the image sharpening application, which is one of the fundamental operations to improve visual effects and highlight fine details in an image. 38 The rest of the paper is organized as follows: The new multicolumn 3,3:2 inexact compressor is introduced in Section 2.…”

Section: Introductionmentioning

confidence: 99%

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Design and evaluation of ultra‐fast 8‐bit approximate multipliers using novel multicolumn inexact compressors

Karimi

Mirzaee

Fakeri-Tabrizi

et al. 2023

Circuit Theory & Apps

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Summary A multiplier, as a key component in many different applications, is a time‐consuming, energy‐intensive computation block. Approximate computing is a practical design paradigm that attempts to improve hardware efficacy while keeping computation quality satisfactory. A novel multicolumn 3,3:2 inexact compressor is presented in this paper. It takes three partial products from two adjacent columns each for rapid partial product reduction. The proposed inexact compressor and its derivatives enable us to design a high‐speed approximate multiplier. Then, another ultra‐fast, high‐efficient approximate multiplier is achieved by utilizing a systematic truncation strategy. The proposed multipliers accumulate partial products in only two stages, one fewer stage than other approximate multipliers in the literature. Implementation results by the Synopsys Design Compiler and 45 nm technology node demonstrate nearly 11.11% higher speed for the second proposed design over the fastest existing approximate multiplier. Furthermore, the new approximate multipliers are applied to the image processing application of image sharpening, and their performance in this application is highly satisfactory. It is shown in this paper that the error pattern of an approximate multiplier, in addition to the mean error distance and error rate, has a direct effect on the outcomes of the image processing application.

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Section: Proposed Multicolumn Inexact Compressormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Design and evaluation of ultra‐fast 8‐bit approximate multipliers using novel multicolumn inexact compressors

Karimi

Mirzaee

Fakeri-Tabrizi

et al. 2023

Circuit Theory & Apps

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“…In this work, the proposed WSAA is aimed to produce more errors in random so that it could be used in encryption schemes. For the proposed 8-bit WSAA, the following error metrics [33,34] are calculated:…”

Section: Error Characteristics Of the Proposed Wsaamentioning

confidence: 99%

A Novel Random Error Approximate Adder-Based Lightweight Medical Image Encryption Scheme for Secure Remote Monitoring of Health Data

Nagarajan

Muthaiah

Teekaraman

et al. 2021

Security and Communication Networks

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In the present global scenario, social distancing is an inevitable one. The need for social distancing and advancements of technology to facilitate the patients and doctors around the world mandated the telemedicine and remote monitoring of patience details as the pivotal way to diagnose the disease. In this, it is essential to transmit the patient’s information such as X-ray and scan images of them to the doctor in the remote location. Preventing the medical data from the technological adversaries is the need of the hour. Infinitesimal attacks in medical images may cost human lives. This work proposes a lightweight, secure medical image encryption scheme for the remote monitoring of health data. The proposed encryption scheme uses computationally less complex weighted shift approximate adder (WSAA)–based encryption logic. The scheme uses a 256-bit key for the encryption process that strengthens the encryption and robust against various attacks. The proposed encryption scheme deploys the WSAA for diffusing the pixel values. A unique way of key distribution for pixel-wise encryption within the image is proposed that avoids the need for separate logic for the pixel-wise confusion. The proposed Encryption scheme is evaluated for its entropy and horizontal, vertical, diagonal correlation, histogram, key space, and sensitivity. Experimental results affirm that the proposed scheme significantly good with less computational complexity. The peak signal-to-noise ratio (PSNR) value of the decrypted image is infinity, and this matches the ideal requirement of the medical encryption scheme.

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Design of Energy-Efficient Approximate Arithmetic Circuits for Error Tolerant Medical Image Processing Applications

Ahilan,

Albert Raj,

Gorantla

et al. 2024

Lecture Notes in Electrical Engineering

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High performance compact energy efficient error tolerant adders and multipliers for 16-bit image processing applications

Cited by 23 publications

References 16 publications

Design and evaluation of ultra‐fast 8‐bit approximate multipliers using novel multicolumn inexact compressors

Design and evaluation of ultra‐fast 8‐bit approximate multipliers using novel multicolumn inexact compressors

A Novel Random Error Approximate Adder-Based Lightweight Medical Image Encryption Scheme for Secure Remote Monitoring of Health Data

Design of Energy-Efficient Approximate Arithmetic Circuits for Error Tolerant Medical Image Processing Applications

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