High performance area efficient DA based FIR filter for concurrent decision feedback equalizer

Vijetha, K.; Naik, Bighnaraj

doi:10.1007/s10772-020-09695-x

Cited by 6 publications

(2 citation statements)

References 11 publications

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“…DA makes efficient use of LUTs, shifters, and adders to calculate the sum of products required for FIR filters. Since these operations effectively map onto an FPGA, Distributed arithmetic on these devices is a favourable architecture [11].…”

Section: Proposed Methods and Algorithm Designmentioning

confidence: 99%

Design and implementation of DA FIR filter for bio-inspired computing architecture

Prashanth

Ahmed

Kounte

2021

IJECE

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This paper elucidates the system construct of DA-FIR filter optimized for design of distributed arithmetic (DA) finite impulse response (FIR) filter and is based on architecture with tightly coupled co-processor based data processing units. With a series of look-up-table (LUT) accesses in order to emulate multiply and accumulate operations the constructed DA based FIR filter is implemented on FPGA. The very high speed integrated circuit hardware description language (VHDL) is used implement the proposed filter and the design is verified using simulation. This paper discusses two optimization algorithms and resulting optimizations are incorporated into LUT layer and architecture extractions. The proposed method offers an optimized design in the form of offers average miminimizations of the number of LUT, reduction in populated slices and gate minimization for DA-finite impulse response filter. This research paves a direction towards development of bio inspired computing architectures developed without logically intensive operations, obtaining the desired specifications with respect to performance, timing, and reliability.

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Section: Proposed Methods and Algorithm Designmentioning

confidence: 99%

Design and implementation of DA FIR filter for bio-inspired computing architecture

Prashanth

Ahmed

Kounte

2021

IJECE

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“…Telecommunications, sonar, radar, audio with video signal processing, noise cancellation are some of the applications for this filter. [6][7][8][9] The filter performance is determined by the algorithm for adaption along filter design. Passive filters attenuate the signal since the filters in the input signals frequency range.…”

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confidence: 99%

Adaptive FIR Filter Design with Approximate Adder and Hybridized Multiplier for Efficient Noise Eradication in Sensor Nodes

Immareddy,

Sundaramoorthy,

Alagarsamy

2023

ECS J. Solid State Sci. Technol.

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Finite Impulse Response (FIR) filter contributes a major role in most of the signal processing applications. However, the Finite Impulse Response filter performance is restricted by its speed, power and area usage. To address these issues, an adaptive FIR filter design using approximate adder and Hybridizing (Radix-8 Booth and TRAM) Approximate Multiplier (DA-AFIR-leadx-hybam-AC) is proposed in this manuscript for eradicating the noise in the sensor nodes. Here, Low error together with area efficient approximate adder (leadx) is used for reducing path delay and area utilization. For approximate multiplier design, proposed Hybridizing (Radix-8 Booth and TRAM) Approximate Multiplier using 15–4 Approximate Compressors (hybam-AC) is used for decreasing power consumption and design complexity. The simulation of the proposed model is implemented in Verilog and the design is synthesized in FPGA utilizing Xilinx ISE 14.5. The proposed DA-AFIR-leadx-hybam-AC filter design attains 33.6%, 22.75%, 29.69% lower power and 43.58%, 11.3%, 33.07% lower delay than the existing approaches, like DA-AFIR-MLDA-RNS, DA-AFIR-Hyb-CSD-ABR, DA-AFIR-SOPOT-MPGBP. Finally, the proposed DA-AFIR-leadx-hybam-AC filter design is applied for noise removal application in sensor nodes. The proposed Filter is implemented in MATLAB/Simulink for reading input signal.

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Distributed arithmetic-FIR filter design using Approximate Karatsuba Multiplier and VLCSA

Krishnan,

Vidhya

2024

Expert Systems with Applications

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High performance area efficient DA based FIR filter for concurrent decision feedback equalizer

Cited by 6 publications

References 11 publications

Design and implementation of DA FIR filter for bio-inspired computing architecture

Design and implementation of DA FIR filter for bio-inspired computing architecture

Adaptive FIR Filter Design with Approximate Adder and Hybridized Multiplier for Efficient Noise Eradication in Sensor Nodes

Distributed arithmetic-FIR filter design using Approximate Karatsuba Multiplier and VLCSA

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