High mobility top gated field-effect transistors and integrated circuits based on chemical vapor deposition-derived monolayer MoS<SUB>2</SUB>

Abstract

Monolayer MoS 2 with large area and high quality are grown using chemical vapor deposition (CVD) on Si/SiO 2 substrate, the triangle grain size is about 50 m, and top-gated field-effect transistors (FETs) were fabricated using atomic layer deposition (ALD) grown HfO 2 at low temperature as high-k gate insulator. The transistors present typical n-type field-effect properties, especially with high carrier mobility up to about 36.4 cm 2 /Vs, which is the highest value of mobility of top gated transistors based on CVD-derived single layer MoS 2 . Two kinds of methods were used to extract mobility from the measured properties of FETs, and the consistent results indicated the retrieved mobility was reliable. In addition an inverter circuit with gain larger than 1 was constructed based on the n-type FETs.

Lowering the Schottky Barrier Height by Graphene/Ag Electrodes for High‐Mobility MoS2 Field‐Effect Transistors

“…With the graphene interlayer at the source/drain contacts, the on/off current ratio and field‐effect mobility were significantly improved from 7 × 10 7 to 4 × 10 8 and from 12 to 35 cm 2 V −1 s −1 (maximum value of 36 cm 2 V −1 s −1 ), respectively (Figure ). This mobility value is the highest among those of back‐gated CVD‐grown MoS 2 FETs and comparable to those of top‐gated CVD‐grown FETs reported previously, as summarized in Table S1 in the Supporting Information. These improvements can be explained by the effective electron injection via graphene/Ag contacts, which is a result of the lowering of the effective Schottky barrier height between the electrode and MoS 2 channel and consequently reduced contact resistance.…”

Engineering Field Effect Transistors with 2D Semiconducting Channels: Status and Prospects

“…Besides that, the mobility of MoS 2 decreases with decreasing channel length in both back‐gated (see Figure d) and top‐gated configuration, which may be attributed to two reasons. First, in 2D‐FETs with metal/2D material contact resistance (which do not scale with channel length), the negative effect of the contact resistance would become more and more obvious when it becomes more comparable to the channel resistance during downscaling.…”

Atomic Layer Deposition on 2D Materials

“…Meanwhile, the continuous growth of ALD Al 2 O 3 without a seed layer or pretreatment, which is inconsistent with previous reports, could be explained by physisorption of the precursor at low temperature, surface residues from CVD reactions, and effects of the bottom substrate through the single TMD layer. In fact, most research showing continuous growth of ALD Al 2 O 3 employed low deposition temperatures below 200 °C, at which the TMA precursor physisorbs on MoS 2 , leading to random nucleation of Al 2 O 3 . ,,,, Similarly, there were reports on continuous growth of other ALD metal oxides on various TMDs, including MoS 2 , WS 2 , WTe 2 , and WSe 2 , via physisorption of the precursors at low temperature. ,, …”

“…23 In the report, they also observed selective deposition of Al 92,93,118,119,121 Similarly, there were reports on continuous growth of other ALD metal oxides on various TMDs, including MoS 2 , WS 2 , WTe 2 , and WSe 2 , via physisorption of the precursors at low temperature. 125,127,133 Selenide 2D materials of TMDs were pretreated by UV−O 3 or coated with a seed layer for better ALD nucleation. Azcatl and co-workers intensively investigated the surface property changes of MoSe 2 and WSe 2 under UV-O 3 pretreatment using an in situ XPS technique.…”