High Mobility Ge pMOSFETs with ZrO2 Dielectric: Impacts of Post Annealing

Abstract

This paper investigates the impacts of post metal annealing (PMA) and post deposition annealing (PDA) on the electrical performance of Ge p-type metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ZrO 2 dielectric. For the transistors without PDA, on-state current ( I ON ), subthreshold swing (SS), and capacitance equivalent thickness (CET) characteristics are improved with PMA temperature increasing from 350 to 500 °C. Crystallization of ZrO 2 dielectric at the higher PMA temperature contributes to the increase of the permittivity of ZrO 2 and the decrease of the density of interface states ( D it ), resulting in a reduced CET and high effective hole mobility ( μ eff ). It is demonstrated that Ge pMOSFETs with a PDA treatment at 400 °C have a lower CET and a steeper SS but a lower μ eff compared to devices without PDA.

Annealing Effects on the Charging–Discharging Mechanism in Trilayer Al2O3/Ge/Al2O3 Memory Structures

“…35−37 Ge-NPs-based single layers or embedded in high-k dielectrics were successfully obtained through magnetron sputtering (MS), 38 pulsed laser deposition, 39 electron-beam evaporation method, 40 and atomic layer deposition. 41 Ge-NPs nanostructuring is achieved by annealing the structures in classical furnaces or by rapid thermal annealing (RTA) at temperatures in the range of 500 to 900 °C. 42,43 At high temperatures, Ge diffusion and/or evaporation are strong, 44 leading to a low confinement and loss of abrupt interfaces of the structure that are critical for good memory performances.…”

“…Ge-NPs-based single layers or embedded in high- k dielectrics were successfully obtained through magnetron sputtering (MS), pulsed laser deposition, electron-beam evaporation method, and atomic layer deposition …”

Fabrication of a polycrystalline SiGe- and Ge-on-insulator by Ge condensation of amorphous SiGe on a SiO2/Si substrate

“…The high carrier mobility has motivated abundant investigations of Ge-based electronic devices, such as the 4 Authors to whom any correspondence should be addressed. metal-oxide-semiconductor field-effect-transistor [1,2]. With an 'on-insulator' structure, the performance of Ge electronic devices can be further improved through reducing parasitic capacitance and leakage current.…”