High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign

Nguyen, Duc Tri; Dang, Viet Ba; Gaj, Kris

doi:10.1007/978-3-030-44534-8_19

Cited by 18 publications

(8 citation statements)

References 9 publications

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“…Based on the master theorem of computational complexity, the time complexity involved in the above multiplication can be given as 58 ) . For faster polynomial multiplication based on NTT, a new hardware architecture is proposed by Nguyen et al 96 The NTT hardware accelerators will be implemented for Kyber and NewHope to improve the overall efficiency. Another hardware accelerator named CARiMoL was introduced by Ishtiaq et al 97 to provide run-time configurability for multiple security levels in CRYSTALS-Kyber and NewHope schemes.…”

Section: Polynomial Multiplicationmentioning

confidence: 99%

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

Kumari

Singh

et al. 2022

Softw Pract Exp

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As the number and characteristics of smart devices change, the concept of the Internet of Things (IoT) emerges. The IoT provides the connected devices with a variety of resources that enable effective communication. At this point, several security issues arise to get the sensitive information behind every communication in the IoT. To provide users with security and privacy, cryptographic schemes are adopted, the most popular being public key cryptographic systems (PKC). However, with the advent of quantum computing, the level of security that can be provided by the PKC schemes is a big question. Another important issue is that the IoT environment is resource-constrained, which necessitates the implementation of lightweight cryptographic algorithms for better security. In response to these issues, the post-quantum cryptographic (PQC) schemes are one of the significant developments contributing to IoT security in the post-quantum world. This article examines the key security issues in the IoT environment and examines the effective solutions found in the literature. The problems in IoT in the quantum era are discussed and appropriate solutions by PKC schemes under limited resources in IoT are focused. As the lattice-based cryptosystems are more effective, the importance of these schemes

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Section: Polynomial Multiplicationmentioning

confidence: 99%

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

Kumari

Singh

et al. 2022

Softw Pract Exp

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“…This way we pipeline and partially unroll the forward elimination inner loop (line 11), increasing its throughput at one row element per clock cycle. To take further advantage of the internal parallelization potential of the Gaussian systemizer, we completely unroll and pipeline the backwards substitution loop (lines [19][20][21][22][23][24][25][26][27]. Its two computational loops (lines 19, 24) are merged, thus decreasing the latency.…”

Section: Hardware/software Co-designmentioning

confidence: 99%

HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem

Kostalabros

Ribes-González

Farràs

et al. 2021

2021 31st International Conference on Field-Programmable Logic and Applications (FPL)

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While quantum computers are rapidly becoming more powerful, the current cryptographic infrastructure is imminently threatened. In a preventive manner, the U.S. National Institute of Standards and Technology (NIST) has initiated a process to evaluate quantum-resistant cryptosystems, to form the first post-quantum (PQ) cryptographic standard. Classic McEliece (CM) is one of the most prominent cryptosystems considered for standardization in NIST's PQ cryptography contest. However, its computational cost poses notable challenges to a big fraction of existing computing devices. This work presents an HLS-based, HW/SW co-design acceleration of the CM Key Encapsulation Mechanism (CM KEM). We demonstrate significant maximum speedups of up to 55.2×, 3.3×, and 8.7× in the CM KEM algorithms of key generation, encapsulation, and decapsulation respectively, comparing to a SW-only scalar implementation.This paper has the following structure: Section II introduces the CM cryptosystem and presents the motivation for this work. Section III analyzes our HW/SW co-design proposal. Next, Section IV explains our experimental methodology.

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“…A methodology was proposed in [20] for optimizing NTT loops structure, via loop flattening and trip count reduction to optimize the synthesized code via HLS adding directives with various loop expansion approaches. In [21] an NTT HLS implementation is performed using Vivado 2018.3 on a Zynq UltraScale+ MPSoC and show a penalty of 2% to 5% for latency versus an RTL design and in [22] there is comparison between HLS-ready code using design space exploration based on directives vs. HLS block diagram design. Ozcan and Aysu [2] modularized the NTT algorithm and measured that the most computationally intensive part of it is the Butterfly section, which accounts for 78% of all cycles.…”

Section: Number Theoretic Transform (Ntt) a Definitionsmentioning

confidence: 99%

High-Level Synthesis design approach for Number-Theoretic Transform Implementations

El-Kady

Fournaris

Tsakoulis

et al. 2021

2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)

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Lattice-based cryptography performs polynomial multiplication using the Number Theoretic Transform (NTT), in order to reduce the polynomial multiplication complexity from O(n 2 ) to O(n log n). NTT has been in the center of investigation in cryptography space, as it is applied in many cryptography schemes such as hash functions, homomorphic encryption, keyencapsulation mechanisms, and digital signatures. A common approach for rapid production of hardware designs commences from semi-automatic software production, as supported by the Xilinx High-Level Synthesis (HLS) toolchain or similar tools. Most of the times this approach requires careful modifications (e.g. code modification, loop reordering, loop flattening, removing dependencies, loop pipelining, loop unrolling) in order to achieve a design with performance comparable to a Register-Transfer Level (RTL) hand-crafted design. In this paper a design solution is proposed that solves the data and loop-carry dependencies of the Cooley-Tukey NTT algorithm, by assisting the HLS synthesizer to produce efficient designs, in terms of latency and resources. The proposed work has been evaluated using the Dilithium digital-signature scheme NTT version (n = 256, Q of 23 bits), and is shown to achieve a 20-50% improvement in terms of latency (without really affecting the resources) compared to other existing HLS-based NTT solutions in the literature.

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High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign

Cited by 18 publications

References 9 publications

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

Post‐quantum cryptography techniques for secure communication in resource‐constrained Internet of Things devices: A comprehensive survey

HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem

High-Level Synthesis design approach for Number-Theoretic Transform Implementations

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