High-Level Synthesis for Designing Multimode Architectures

Andriamisaina, Caaliph; Coussy, Philippe; Casseau, Emmanuel

doi:10.1109/tcad.2010.2062751

Cited by 12 publications

(4 citation statements)

References 21 publications

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“…And also, authors did not consider the effect of the proposed methodology on the controller area during the binding step. That is why [4] takes into account the increase of both the controller and the interconnection cost. First it performs a joint scheduling algorithm and then try to optimize the binding step.…”

Section: Related Workmentioning

confidence: 99%

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A Top-Down Optimization Methodology for Mutually Exclusive Applications

Kilic

Marrakchi²,

Mehrez

2014

International Journal of Reconfigurable Computing

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Proliferation of mutually exclusive applications on circuits and the higher cost of silicon make the resource sharing more and more important. The state-of-the-art synthesis tools may often be unsatisfactory. Their efficiency may depend on the hardware description style. Nevertheless, today, different applications in a circuit can be developed by different developers. This paper proposes an efficient method to improve resource sharing between mutually exclusive applications with no dependence on the coding style. It takes the advantage of the possibility of resource sharing as done in FPGA and of predefined multiple functions as in ASIC.

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Section: Related Workmentioning

confidence: 99%

“…The goal is to ensure the equivalence of two given circuit descriptions between different levels of abstraction. (1) for all SITES in the architecture do (2) V ← Netlists using this SITE (3) if (SITE contains a CLB) and (# of V > 1) then (4) ← 0 (5) for all Permutations do (6) ← Count Equal Bits in LUT Configurations of…”

Section: Validationmentioning

confidence: 99%

A Top-Down Optimization Methodology for Mutually Exclusive Applications

Kilic

Marrakchi²,

Mehrez

2014

International Journal of Reconfigurable Computing

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“…With the help of multimode architectures for digital signal and image processing applications designed in [4]. To specify the dedicated design flow graph for timewise throughput constraints and architecture based optimized area is to be generated.…”

Section: A New Approaches To Scheduling and Allocation In Technology mentioning

confidence: 99%

Survey On Scheduling And Allocation In High Level Synthesis

Chinnadurai¹

2012

IJCSES

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“…With the help of multimode architectures for digital signal and image processing applications designed in [4]. To specify the dedicated design flow graph for time-wise throughput constraints and architecture based optimized area is to be generated.…”

Section: A New Approaches To Scheduling and Allocation In Technology mentioning

confidence: 99%